A Novel Method to Improve Laser Anneal Worsened Negative Bias Temperature Instability in 40-nm CMOS Technology
From the measured data, the impact of the rapid thermal process (RTP) and laser spike anneal (LSA) sequence on negative bias temperature instability (NBTI) and current gain was investigated on 40-nm complementary metal-oxide semiconductor technology. For the conventional sequence RTP/LSA, a signific...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on electron devices 2011-03, Vol.58 (3), p.901-905 |
|---|---|
| Hauptverfasser: | , , , , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 905 |
|---|---|
| container_issue | 3 |
| container_start_page | 901 |
| container_title | IEEE transactions on electron devices |
| container_volume | 58 |
| creator | Ming-Shing Chen Yean-Kuen Fang Feng-Renn Juang Yen-Ting Chiang Cheng-I Lin Tung-Hsing Lee Chou, Sam Ning, Judy |
| description | From the measured data, the impact of the rapid thermal process (RTP) and laser spike anneal (LSA) sequence on negative bias temperature instability (NBTI) and current gain was investigated on 40-nm complementary metal-oxide semiconductor technology. For the conventional sequence RTP/LSA, a significant threshold voltage V T shift is observed due to the NBTI. The thermal gradient in the LSA step induces a thermomechanical stress inducing oxide fixed charges and an increase in Si dangling bonds at the SiON/Si interface, thus increasing the V T shift. By moving the LSA step to before the RTP anneal and coimplanting a carbon atom in the source/drain extension implant processing, the obvious V T shift could be suppressed to the same as the RTP-only anneal. Best of all, the sequence change does not impact the gain of the original combination anneal over the RTP-only anneal in the on current of devices. |
| doi_str_mv | 10.1109/TED.2010.2102358 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_5688446</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5688446</ieee_id><sourcerecordid>864420319</sourcerecordid><originalsourceid>FETCH-LOGICAL-c305t-1d15bbea3f14a48c6a3d75b4ea939e2eff82cb53106b53b4a98929823e9a4ad53</originalsourceid><addsrcrecordid>eNpdkU1v2zAMhoVhBZa1vQ_YRRgw7OROn450zNKuDZC2h2bYUaBtulVhS5nkDMi_n4IEPexCguRDgnxJyCfOrjhn9vvm5vpKsBIJzoTU5h2Zca3nla1V_Z7MGOOmstLID-Rjzq8lrJUSMxIW9CH-xYHe4_QSOzpFuhq3qaToGjImuggBYaC_Y8oYsKMP-AyTL-UfHjLd4LjFBNMuIV2FPEHjBz_tqQ9UsSqMdHn_-FSo9iXEIT7vL8hZD0PGy5M_J79-3myWd9X68Xa1XKyrVjI9VbzjumkQZM8VKNPWILu5bhSClRYF9r0RbaMlZ3WxjQJrrLBGSLSgoNPynHw7zi2n_Nlhntzoc4vDAAHjLjtzuJ5Jbgv55T_yNe5SKMs5o6XQc2t5gdgRalPMOWHvtsmPkPaOM3eQ3xX53UF-d5K_tHw9zYXcwtAnCK3Pb31CHp5hZOE-HzmPiG9lXRujVC3_Af_pjKI</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>853257991</pqid></control><display><type>article</type><title>A Novel Method to Improve Laser Anneal Worsened Negative Bias Temperature Instability in 40-nm CMOS Technology</title><source>IEEE Electronic Library (IEL)</source><creator>Ming-Shing Chen ; Yean-Kuen Fang ; Feng-Renn Juang ; Yen-Ting Chiang ; Cheng-I Lin ; Tung-Hsing Lee ; Chou, Sam ; Ning, Judy</creator><creatorcontrib>Ming-Shing Chen ; Yean-Kuen Fang ; Feng-Renn Juang ; Yen-Ting Chiang ; Cheng-I Lin ; Tung-Hsing Lee ; Chou, Sam ; Ning, Judy</creatorcontrib><description>From the measured data, the impact of the rapid thermal process (RTP) and laser spike anneal (LSA) sequence on negative bias temperature instability (NBTI) and current gain was investigated on 40-nm complementary metal-oxide semiconductor technology. For the conventional sequence RTP/LSA, a significant threshold voltage V T shift is observed due to the NBTI. The thermal gradient in the LSA step induces a thermomechanical stress inducing oxide fixed charges and an increase in Si dangling bonds at the SiON/Si interface, thus increasing the V T shift. By moving the LSA step to before the RTP anneal and coimplanting a carbon atom in the source/drain extension implant processing, the obvious V T shift could be suppressed to the same as the RTP-only anneal. Best of all, the sequence change does not impact the gain of the original combination anneal over the RTP-only anneal in the on current of devices.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2010.2102358</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Annealing ; Applied sciences ; Bias ; CMOS integrated circuits ; Complementary metal-oxide-semiconductor (CMOS) device ; Design. Technologies. Operation analysis. Testing ; Devices ; Electronics ; Exact sciences and technology ; flash-lamp annealing (FLA) ; Fundamental areas of phenomenology (including applications) ; Instability ; Integrated circuits ; Junctions ; laser spike anneal (LSA) ; Lasers ; Logic gates ; Metal oxide semiconductors ; Microelectronics ; MOSFET circuits ; negative bias temperature instability (NBTI) ; Optical sources and standards ; Optics ; Physics ; Rapid thermal annealing ; rapid thermal annealing (RTA) ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Semiconductors ; Silicon oxynitride</subject><ispartof>IEEE transactions on electron devices, 2011-03, Vol.58 (3), p.901-905</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Mar 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c305t-1d15bbea3f14a48c6a3d75b4ea939e2eff82cb53106b53b4a98929823e9a4ad53</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5688446$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5688446$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=23938383$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Ming-Shing Chen</creatorcontrib><creatorcontrib>Yean-Kuen Fang</creatorcontrib><creatorcontrib>Feng-Renn Juang</creatorcontrib><creatorcontrib>Yen-Ting Chiang</creatorcontrib><creatorcontrib>Cheng-I Lin</creatorcontrib><creatorcontrib>Tung-Hsing Lee</creatorcontrib><creatorcontrib>Chou, Sam</creatorcontrib><creatorcontrib>Ning, Judy</creatorcontrib><title>A Novel Method to Improve Laser Anneal Worsened Negative Bias Temperature Instability in 40-nm CMOS Technology</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>From the measured data, the impact of the rapid thermal process (RTP) and laser spike anneal (LSA) sequence on negative bias temperature instability (NBTI) and current gain was investigated on 40-nm complementary metal-oxide semiconductor technology. For the conventional sequence RTP/LSA, a significant threshold voltage V T shift is observed due to the NBTI. The thermal gradient in the LSA step induces a thermomechanical stress inducing oxide fixed charges and an increase in Si dangling bonds at the SiON/Si interface, thus increasing the V T shift. By moving the LSA step to before the RTP anneal and coimplanting a carbon atom in the source/drain extension implant processing, the obvious V T shift could be suppressed to the same as the RTP-only anneal. Best of all, the sequence change does not impact the gain of the original combination anneal over the RTP-only anneal in the on current of devices.</description><subject>Annealing</subject><subject>Applied sciences</subject><subject>Bias</subject><subject>CMOS integrated circuits</subject><subject>Complementary metal-oxide-semiconductor (CMOS) device</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>flash-lamp annealing (FLA)</subject><subject>Fundamental areas of phenomenology (including applications)</subject><subject>Instability</subject><subject>Integrated circuits</subject><subject>Junctions</subject><subject>laser spike anneal (LSA)</subject><subject>Lasers</subject><subject>Logic gates</subject><subject>Metal oxide semiconductors</subject><subject>Microelectronics</subject><subject>MOSFET circuits</subject><subject>negative bias temperature instability (NBTI)</subject><subject>Optical sources and standards</subject><subject>Optics</subject><subject>Physics</subject><subject>Rapid thermal annealing</subject><subject>rapid thermal annealing (RTA)</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Semiconductors</subject><subject>Silicon oxynitride</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkU1v2zAMhoVhBZa1vQ_YRRgw7OROn450zNKuDZC2h2bYUaBtulVhS5nkDMi_n4IEPexCguRDgnxJyCfOrjhn9vvm5vpKsBIJzoTU5h2Zca3nla1V_Z7MGOOmstLID-Rjzq8lrJUSMxIW9CH-xYHe4_QSOzpFuhq3qaToGjImuggBYaC_Y8oYsKMP-AyTL-UfHjLd4LjFBNMuIV2FPEHjBz_tqQ9UsSqMdHn_-FSo9iXEIT7vL8hZD0PGy5M_J79-3myWd9X68Xa1XKyrVjI9VbzjumkQZM8VKNPWILu5bhSClRYF9r0RbaMlZ3WxjQJrrLBGSLSgoNPynHw7zi2n_Nlhntzoc4vDAAHjLjtzuJ5Jbgv55T_yNe5SKMs5o6XQc2t5gdgRalPMOWHvtsmPkPaOM3eQ3xX53UF-d5K_tHw9zYXcwtAnCK3Pb31CHp5hZOE-HzmPiG9lXRujVC3_Af_pjKI</recordid><startdate>20110301</startdate><enddate>20110301</enddate><creator>Ming-Shing Chen</creator><creator>Yean-Kuen Fang</creator><creator>Feng-Renn Juang</creator><creator>Yen-Ting Chiang</creator><creator>Cheng-I Lin</creator><creator>Tung-Hsing Lee</creator><creator>Chou, Sam</creator><creator>Ning, Judy</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20110301</creationdate><title>A Novel Method to Improve Laser Anneal Worsened Negative Bias Temperature Instability in 40-nm CMOS Technology</title><author>Ming-Shing Chen ; Yean-Kuen Fang ; Feng-Renn Juang ; Yen-Ting Chiang ; Cheng-I Lin ; Tung-Hsing Lee ; Chou, Sam ; Ning, Judy</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c305t-1d15bbea3f14a48c6a3d75b4ea939e2eff82cb53106b53b4a98929823e9a4ad53</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Annealing</topic><topic>Applied sciences</topic><topic>Bias</topic><topic>CMOS integrated circuits</topic><topic>Complementary metal-oxide-semiconductor (CMOS) device</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>flash-lamp annealing (FLA)</topic><topic>Fundamental areas of phenomenology (including applications)</topic><topic>Instability</topic><topic>Integrated circuits</topic><topic>Junctions</topic><topic>laser spike anneal (LSA)</topic><topic>Lasers</topic><topic>Logic gates</topic><topic>Metal oxide semiconductors</topic><topic>Microelectronics</topic><topic>MOSFET circuits</topic><topic>negative bias temperature instability (NBTI)</topic><topic>Optical sources and standards</topic><topic>Optics</topic><topic>Physics</topic><topic>Rapid thermal annealing</topic><topic>rapid thermal annealing (RTA)</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Semiconductors</topic><topic>Silicon oxynitride</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ming-Shing Chen</creatorcontrib><creatorcontrib>Yean-Kuen Fang</creatorcontrib><creatorcontrib>Feng-Renn Juang</creatorcontrib><creatorcontrib>Yen-Ting Chiang</creatorcontrib><creatorcontrib>Cheng-I Lin</creatorcontrib><creatorcontrib>Tung-Hsing Lee</creatorcontrib><creatorcontrib>Chou, Sam</creatorcontrib><creatorcontrib>Ning, Judy</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ming-Shing Chen</au><au>Yean-Kuen Fang</au><au>Feng-Renn Juang</au><au>Yen-Ting Chiang</au><au>Cheng-I Lin</au><au>Tung-Hsing Lee</au><au>Chou, Sam</au><au>Ning, Judy</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Novel Method to Improve Laser Anneal Worsened Negative Bias Temperature Instability in 40-nm CMOS Technology</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2011-03-01</date><risdate>2011</risdate><volume>58</volume><issue>3</issue><spage>901</spage><epage>905</epage><pages>901-905</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>From the measured data, the impact of the rapid thermal process (RTP) and laser spike anneal (LSA) sequence on negative bias temperature instability (NBTI) and current gain was investigated on 40-nm complementary metal-oxide semiconductor technology. For the conventional sequence RTP/LSA, a significant threshold voltage V T shift is observed due to the NBTI. The thermal gradient in the LSA step induces a thermomechanical stress inducing oxide fixed charges and an increase in Si dangling bonds at the SiON/Si interface, thus increasing the V T shift. By moving the LSA step to before the RTP anneal and coimplanting a carbon atom in the source/drain extension implant processing, the obvious V T shift could be suppressed to the same as the RTP-only anneal. Best of all, the sequence change does not impact the gain of the original combination anneal over the RTP-only anneal in the on current of devices.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2010.2102358</doi><tpages>5</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 2011-03, Vol.58 (3), p.901-905 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_ieee_primary_5688446 |
| source | IEEE Electronic Library (IEL) |
| subjects | Annealing Applied sciences Bias CMOS integrated circuits Complementary metal-oxide-semiconductor (CMOS) device Design. Technologies. Operation analysis. Testing Devices Electronics Exact sciences and technology flash-lamp annealing (FLA) Fundamental areas of phenomenology (including applications) Instability Integrated circuits Junctions laser spike anneal (LSA) Lasers Logic gates Metal oxide semiconductors Microelectronics MOSFET circuits negative bias temperature instability (NBTI) Optical sources and standards Optics Physics Rapid thermal annealing rapid thermal annealing (RTA) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductors Silicon oxynitride |
| title | A Novel Method to Improve Laser Anneal Worsened Negative Bias Temperature Instability in 40-nm CMOS Technology |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T08%3A06%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Novel%20Method%20to%20Improve%20Laser%20Anneal%20Worsened%20Negative%20Bias%20Temperature%20Instability%20in%2040-nm%20CMOS%20Technology&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Ming-Shing%20Chen&rft.date=2011-03-01&rft.volume=58&rft.issue=3&rft.spage=901&rft.epage=905&rft.pages=901-905&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/TED.2010.2102358&rft_dat=%3Cproquest_RIE%3E864420319%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=853257991&rft_id=info:pmid/&rft_ieee_id=5688446&rfr_iscdi=true |