Impulse response of on-chip power supply networks under varying conditions
This paper presents a method for modeling chip-package resonance using impulse response and for measuring waveforms under varying conditions. We evaluated chip-package resonance with the following variations in conditions: (i) with and without on-package capacitors; (ii) differing positions on the c...
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| creator | Uematsu, Y Osaka, H Yagyu, M Saito, T |
| description | This paper presents a method for modeling chip-package resonance using impulse response and for measuring waveforms under varying conditions. We evaluated chip-package resonance with the following variations in conditions: (i) with and without on-package capacitors; (ii) differing positions on the chip; (iii) differing points of observation outside the chip (probe points for the package capacitor and bypass capacitor on the printed circuit board); (iv) circuit activating ratios varying from 11% to 100%. The results suggest that a circuit equivalent to our test chip can be expressed as a single lumped circuit. The results also demonstrate the effectiveness of on-package capacitors in reducing extra anti-resonance. |
| doi_str_mv | 10.1109/CPMTSYMPJ.2010.5679675 |
| format | Conference Proceeding |
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The results also demonstrate the effectiveness of on-package capacitors in reducing extra anti-resonance.</description><subject>Capacitors</subject><subject>Impedance</subject><subject>Noise</subject><subject>Power supplies</subject><subject>RLC circuits</subject><subject>Semiconductor device measurement</subject><subject>System-on-a-chip</subject><issn>2373-5449</issn><issn>2475-8418</issn><isbn>1424475937</isbn><isbn>9781424475933</isbn><isbn>1424475929</isbn><isbn>9781424475926</isbn><isbn>9781424475940</isbn><isbn>1424475945</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFUF9LwzAcjP_AOfcJBMkX6Mz_No9SnG5sOLAvPo2m_UWjWxLa1bFvb8CBT3fcccdxCN1TMqWU6Idyvare3lfrxZSRpEmVa5XLM3RDBRMil5rpczRiiWWFoMXFv8Hzy2TwnGdSCH2NJn3_RQihOVdKkBFazHdx2PaAO-hj8IkEi4PPmk8XcQwH6HA_xLg9Yg_7Q-i-ezz4Nqk_dXd0_gM3wbdu71L0Fl3ZOlVNTjhG1eypKl-y5evzvHxcZk6TfdrHOGOS28IoBZYZxa1RUgoLoLRoW2NAgVZMt7RuDbXApGisbTgttCw4H6O7v1oHAJvYuV1asjldwn8BRJFUFQ</recordid><startdate>201008</startdate><enddate>201008</enddate><creator>Uematsu, Y</creator><creator>Osaka, H</creator><creator>Yagyu, M</creator><creator>Saito, T</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201008</creationdate><title>Impulse response of on-chip power supply networks under varying conditions</title><author>Uematsu, Y ; Osaka, H ; Yagyu, M ; Saito, T</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-84232253f8b66ef2b63fb6554fee694ddbbe6e9629d1adb1fe254cffc31895833</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Capacitors</topic><topic>Impedance</topic><topic>Noise</topic><topic>Power supplies</topic><topic>RLC circuits</topic><topic>Semiconductor device measurement</topic><topic>System-on-a-chip</topic><toplevel>online_resources</toplevel><creatorcontrib>Uematsu, Y</creatorcontrib><creatorcontrib>Osaka, H</creatorcontrib><creatorcontrib>Yagyu, M</creatorcontrib><creatorcontrib>Saito, T</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Uematsu, Y</au><au>Osaka, H</au><au>Yagyu, M</au><au>Saito, T</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Impulse response of on-chip power supply networks under varying conditions</atitle><btitle>2010 IEEE CPMT Symposium Japan</btitle><stitle>CPMTSYMPJ</stitle><date>2010-08</date><risdate>2010</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><issn>2373-5449</issn><eissn>2475-8418</eissn><isbn>1424475937</isbn><isbn>9781424475933</isbn><eisbn>1424475929</eisbn><eisbn>9781424475926</eisbn><eisbn>9781424475940</eisbn><eisbn>1424475945</eisbn><abstract>This paper presents a method for modeling chip-package resonance using impulse response and for measuring waveforms under varying conditions. We evaluated chip-package resonance with the following variations in conditions: (i) with and without on-package capacitors; (ii) differing positions on the chip; (iii) differing points of observation outside the chip (probe points for the package capacitor and bypass capacitor on the printed circuit board); (iv) circuit activating ratios varying from 11% to 100%. The results suggest that a circuit equivalent to our test chip can be expressed as a single lumped circuit. The results also demonstrate the effectiveness of on-package capacitors in reducing extra anti-resonance.</abstract><pub>IEEE</pub><doi>10.1109/CPMTSYMPJ.2010.5679675</doi><tpages>4</tpages></addata></record> |
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| ispartof | 2010 IEEE CPMT Symposium Japan, 2010, p.1-4 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Capacitors Impedance Noise Power supplies RLC circuits Semiconductor device measurement System-on-a-chip |
| title | Impulse response of on-chip power supply networks under varying conditions |
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