Template matching operations on a dynamically reconfigurable vision-chip architecture
Recently, for autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. To date, analog-type vision chips and digital vision chips have been developed. Nevertheless, even now, to realize such high-speed real-time image reco...
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creator | Nakada, Hironari Watanabe, Minoru |
description | Recently, for autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. To date, analog-type vision chips and digital vision chips have been developed. Nevertheless, even now, to realize such high-speed real-time image recognition operation is extremely difficult. Therefore, to realize a high-speed real-time image-recognizable vision chip, this paper experimentally presents a template matching operations on a dynamically reconfigurable vision-chip architecture. |
doi_str_mv | 10.1109/ISCIT.2010.5665152 |
format | Conference Proceeding |
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Therefore, to realize a high-speed real-time image-recognizable vision chip, this paper experimentally presents a template matching operations on a dynamically reconfigurable vision-chip architecture.</description><subject>Context</subject><subject>Dynamically reconfigurable devices</subject><subject>Field Programmable Gate Arrays</subject><subject>Holographic optical components</subject><subject>Holography</subject><subject>Image recognition</subject><subject>Logic gates</subject><subject>Optical imaging</subject><subject>Photodiodes</subject><subject>Vision chips</subject><isbn>1424470072</isbn><isbn>9781424470075</isbn><isbn>9781424470099</isbn><isbn>9781424470105</isbn><isbn>1424470099</isbn><isbn>1424470102</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1kE1LxDAYhCMiqGv_gF7yB7omadIkRyl-FBY8WM_Lm-ybNdIv0q7Qf2_BdS7DwDNzGELuOdtyzuxj_VHVzVawNauyVFyJC5JZbbgUUmrGrL0kt_9Bi2uSTdM3W6WELiS_IZ8NdmMLM9IOZv8V-yMdRkwwx6Gf6NBToIelhy56aNuFJvRDH-LxlMC1SH_itHL52hsppNVm9PMp4R25CtBOmJ19Q5qX56Z6y3fvr3X1tMujZXOuGBqDnDsMjgmrRAgsQKm1tYVRTurSB_BcOWs81yCNWOFSO6WQO3koig15-JuNiLgfU-wgLfvzEcUv9idTGg</recordid><startdate>201010</startdate><enddate>201010</enddate><creator>Nakada, Hironari</creator><creator>Watanabe, Minoru</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201010</creationdate><title>Template matching operations on a dynamically reconfigurable vision-chip architecture</title><author>Nakada, Hironari ; Watanabe, Minoru</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-50e88e11befb02952ff0fa67799385b476cfac15b98c17a482e1167b55e1b4d33</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Context</topic><topic>Dynamically reconfigurable devices</topic><topic>Field Programmable Gate Arrays</topic><topic>Holographic optical components</topic><topic>Holography</topic><topic>Image recognition</topic><topic>Logic gates</topic><topic>Optical imaging</topic><topic>Photodiodes</topic><topic>Vision chips</topic><toplevel>online_resources</toplevel><creatorcontrib>Nakada, Hironari</creatorcontrib><creatorcontrib>Watanabe, Minoru</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nakada, Hironari</au><au>Watanabe, Minoru</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Template matching operations on a dynamically reconfigurable vision-chip architecture</atitle><btitle>2010 10th International Symposium on Communications and Information Technologies</btitle><stitle>ISCIT</stitle><date>2010-10</date><risdate>2010</risdate><spage>1091</spage><epage>1096</epage><pages>1091-1096</pages><isbn>1424470072</isbn><isbn>9781424470075</isbn><eisbn>9781424470099</eisbn><eisbn>9781424470105</eisbn><eisbn>1424470099</eisbn><eisbn>1424470102</eisbn><abstract>Recently, for autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. To date, analog-type vision chips and digital vision chips have been developed. Nevertheless, even now, to realize such high-speed real-time image recognition operation is extremely difficult. Therefore, to realize a high-speed real-time image-recognizable vision chip, this paper experimentally presents a template matching operations on a dynamically reconfigurable vision-chip architecture.</abstract><pub>IEEE</pub><doi>10.1109/ISCIT.2010.5665152</doi><tpages>6</tpages></addata></record> |
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ispartof | 2010 10th International Symposium on Communications and Information Technologies, 2010, p.1091-1096 |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Context Dynamically reconfigurable devices Field Programmable Gate Arrays Holographic optical components Holography Image recognition Logic gates Optical imaging Photodiodes Vision chips |
title | Template matching operations on a dynamically reconfigurable vision-chip architecture |
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