A persistent rescheduled-page cache for low overhead object code compatibility in VLIW architectures

Object-code compatibility between processor generations is an open issue for VLIW architectures. A potential solution is a technique termed dynamic rescheduling, which performs run-time software rescheduling at the first-time page faults. The time required for rescheduling the pages constitutes a la...

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Bibliographische Detailangaben

Hauptverfasser:	Conte, T.M., Sathaye, S.W., Banerjia, S.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computer architecture Delay Dynamic scheduling Hardware Operating systems Partial response channels Processor scheduling Program processors Runtime VLIW
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