VEDA: Variation-aware energy-efficient Discrete Wavelet Transform architecture
In this paper, we present a unified approach to an energy-efficient variation-tolerant design of Discrete Wavelet Transform (DWT) in the context of image processing applications. It is to be noted that it is not necessary to produce exactly correct numerical outputs in most image processing applicat...
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creator | Gupta, V Karakonstantis, G Mohapatra, D Roy, K |
description | In this paper, we present a unified approach to an energy-efficient variation-tolerant design of Discrete Wavelet Transform (DWT) in the context of image processing applications. It is to be noted that it is not necessary to produce exactly correct numerical outputs in most image processing applications. We exploit this important feature and propose a design methodology for DWT which shows energy quality tradeoffs at each level of design hierarchy starting from the algorithm level down to the architecture and circuit levels by taking advantage of the limited perceptual ability of the Human Visual System. A unique feature of this design methodology is that it guarantees robustness under process variability and facilitates aggressive voltage over-scaling. Simulation results show significant energy savings (74%-83%) with minor degradations in output image quality and avert catastrophic failures under process variations compared to a conventional design. |
doi_str_mv | 10.1109/ICCD.2010.5647753 |
format | Conference Proceeding |
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It is to be noted that it is not necessary to produce exactly correct numerical outputs in most image processing applications. We exploit this important feature and propose a design methodology for DWT which shows energy quality tradeoffs at each level of design hierarchy starting from the algorithm level down to the architecture and circuit levels by taking advantage of the limited perceptual ability of the Human Visual System. A unique feature of this design methodology is that it guarantees robustness under process variability and facilitates aggressive voltage over-scaling. Simulation results show significant energy savings (74%-83%) with minor degradations in output image quality and avert catastrophic failures under process variations compared to a conventional design.</abstract><pub>IEEE</pub><doi>10.1109/ICCD.2010.5647753</doi><tpages>6</tpages></addata></record> |
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subjects | Adders Algorithm design and analysis Computer architecture Discrete wavelet transforms Image quality Image reconstruction PSNR |
title | VEDA: Variation-aware energy-efficient Discrete Wavelet Transform architecture |
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