Register-transfer level deductive fault simulation using decision diagrams

Register-transfer level deductive fault simulation using decision diagrams

The paper presents a deductive method for register-transfer level fault simulation on the system model of high-level decision diagrams. The method is based on the bit coverage fault model, which has been proven to have a good correspondence with gate-level structural faults. Experiments on ITC99 ben...

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Hauptverfasser: Reinsalu, U, Raik, J, Ubar, R
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuit faults
Computational modeling
Data models
Digital systems
Integrated circuit modeling
Logic gates
Registers
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creator Reinsalu, U
Raik, J
Ubar, R
description The paper presents a deductive method for register-transfer level fault simulation on the system model of high-level decision diagrams. The method is based on the bit coverage fault model, which has been proven to have a good correspondence with gate-level structural faults. Experiments on ITC99 benchmark circuits have been carried out showing the feasibility of the proposed approach.
doi_str_mv 10.1109/BEC.2010.5631842
format Conference Proceeding
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subjects Circuit faults
Computational modeling
Data models
Digital systems
Integrated circuit modeling
Logic gates
Registers
title Register-transfer level deductive fault simulation using decision diagrams
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