82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction
A third-order multi-channel incremental ADC with a 5-level quantizer is presented. An optimal decimation filter is used which minimizes the weighted sum of the thermal and quantization output noises. Digital correction is used to suppress mismatches in the multi-bit DAC. The prototype obtained a sig...
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| creator | Wenhuan Yu Aslan, Mehmet Temes, Gabor C |
| description | A third-order multi-channel incremental ADC with a 5-level quantizer is presented. An optimal decimation filter is used which minimizes the weighted sum of the thermal and quantization output noises. Digital correction is used to suppress mismatches in the multi-bit DAC. The prototype obtained a signal-to-noise-and-distortion ratio of 81.5 dB, within a total of 21.7 kHz signal bandwidth at a 10 MHz sampling frequency. The total power consumption for 20 channels is 6.7 mW. |
| doi_str_mv | 10.1109/CICC.2010.5617596 |
| format | Conference Proceeding |
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The total power consumption for 20 channels is 6.7 mW.</description><subject>Calibration</subject><subject>Capacitors</subject><subject>Gabor filters</subject><subject>Modulation</subject><subject>Quantization</subject><subject>Signal to noise ratio</subject><issn>0886-5930</issn><issn>2152-3630</issn><isbn>1424457580</isbn><isbn>9781424457588</isbn><isbn>1424457599</isbn><isbn>9781424457595</isbn><isbn>9781424457601</isbn><isbn>1424457602</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFUMtOwzAQNI9KhNIPQFz8Ay5rO3bsY0l5VKpA4nHiUDn2mhqlaZVGQvw9RlRiL6PZGa1mlpBLDlPOwV7Xi7qeCshUaV4pq4_IOS9FWapM7DEpBFeCSS3h5F8wcEoKMEYzZSWMSGEU00pW0pyRyX7_CXlKxa3UBXk3goYb-vI4f6YCmF-7rsOWps73uMFucC2dzWv6lYY13e6GtMmLgD7jkLYdjakdsKeuCzSkj_Rr99u-R_-rXpBRdO0eJwcck7e729f6gS2f7hf1bMlSrjQwr0pAZzw4LqKHBiNycN7z0gbOVeUaHVRskAetGxWjdRaaEI0CjZWTVo7J1d_dhIirXZ_D9d-rw8PkD3rGWLU</recordid><startdate>201009</startdate><enddate>201009</enddate><creator>Wenhuan Yu</creator><creator>Aslan, Mehmet</creator><creator>Temes, Gabor C</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201009</creationdate><title>82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction</title><author>Wenhuan Yu ; Aslan, Mehmet ; Temes, Gabor C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-c540ea8c0a12fc0befe10acc149d1157ab6d5fbe1d66b5ff9a90bdf8506e7a393</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Calibration</topic><topic>Capacitors</topic><topic>Gabor filters</topic><topic>Modulation</topic><topic>Quantization</topic><topic>Signal to noise ratio</topic><toplevel>online_resources</toplevel><creatorcontrib>Wenhuan Yu</creatorcontrib><creatorcontrib>Aslan, Mehmet</creatorcontrib><creatorcontrib>Temes, Gabor C</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wenhuan Yu</au><au>Aslan, Mehmet</au><au>Temes, Gabor C</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction</atitle><btitle>IEEE Custom Integrated Circuits Conference 2010</btitle><stitle>CICC</stitle><date>2010-09</date><risdate>2010</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><issn>0886-5930</issn><eissn>2152-3630</eissn><isbn>1424457580</isbn><isbn>9781424457588</isbn><eisbn>1424457599</eisbn><eisbn>9781424457595</eisbn><eisbn>9781424457601</eisbn><eisbn>1424457602</eisbn><abstract>A third-order multi-channel incremental ADC with a 5-level quantizer is presented. An optimal decimation filter is used which minimizes the weighted sum of the thermal and quantization output noises. Digital correction is used to suppress mismatches in the multi-bit DAC. The prototype obtained a signal-to-noise-and-distortion ratio of 81.5 dB, within a total of 21.7 kHz signal bandwidth at a 10 MHz sampling frequency. The total power consumption for 20 channels is 6.7 mW.</abstract><pub>IEEE</pub><doi>10.1109/CICC.2010.5617596</doi><tpages>4</tpages></addata></record> |
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| subjects | Calibration Capacitors Gabor filters Modulation Quantization Signal to noise ratio |
| title | 82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction |
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