A 10 bit piecewise linear cascade interpolation dac with loop gain ratio control

This paper proposes a 10 bit linear interpolation digital-to-analog converter (DAC) with area efficiency and a high resolution for an AMLCD drive. Because this proposed structure implements a 1 bit interpolation circuit with a control block for a loop gain ratio, it shows a wide voltage range of int...

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Hauptverfasser: Sungwoo Lee, Kiduk Kim, Kyusung Park, Changbyung Park, Byunghun Lee, Jinyong Jeon, Seungchul Jung, Jin Huh, Junhyeok Yang, Hyunsik Kim, Gyu-Hyeong Cho
Format: Tagungsbericht
Sprache:eng
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