Chip-package co-design for mixed SoC

A chip-package co-design method is presented for high frequency mixed SoC. Based on the analysis of simulation result of package and chip, a RC circuit which is composed of resistor and capacitor is designed on chip to suppress the affect of Simultaneous Switch Noise(SSN). Consequently, chip-package...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Yuhan Gao, Lintao Liu, Liang Chen, Ruzhang Li, Ruimin Xu
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	chip-package co-design Equivalent circuits Integrated circuit modeling Noise RC circuit Semiconductor device measurement Simulation SoC SSN System-on-a-chip Wire
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