A compact system-level simulation method for modern microelectronic packaging
For wafer-level packages with numerous solder balls and other repetitive structures, it's not practical to analyze the wafer-level behavior of the whole structure with the conventional finite-element method (FEM). A package-level nodal analysis method (PLNAM) is developed based on the partition...
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| creator | Shihu Sun Jing Song Qing-An Huang |
| description | For wafer-level packages with numerous solder balls and other repetitive structures, it's not practical to analyze the wafer-level behavior of the whole structure with the conventional finite-element method (FEM). A package-level nodal analysis method (PLNAM) is developed based on the partitioning concept. Using the functional elements, rather than the finite element in FEM, a large or complex package system can be interpreted using a simpler model with the elements interconnected through nodes. Result shows that the error of the nodal displacement can be kept within 5% with proper consideration of the surface compliance effect and the simulation process is much faster than FEM. |
| doi_str_mv | 10.1109/ICEPT.2010.5582364 |
| format | Conference Proceeding |
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A package-level nodal analysis method (PLNAM) is developed based on the partitioning concept. Using the functional elements, rather than the finite element in FEM, a large or complex package system can be interpreted using a simpler model with the elements interconnected through nodes. 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A package-level nodal analysis method (PLNAM) is developed based on the partitioning concept. Using the functional elements, rather than the finite element in FEM, a large or complex package system can be interpreted using a simpler model with the elements interconnected through nodes. Result shows that the error of the nodal displacement can be kept within 5% with proper consideration of the surface compliance effect and the simulation process is much faster than FEM.</abstract><pub>IEEE</pub><doi>10.1109/ICEPT.2010.5582364</doi><tpages>3</tpages></addata></record> |
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| ispartof | 2010 11th International Conference on Electronic Packaging Technology & High Density Packaging, 2010, p.74-76 |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Equations Finite element methods Integrated circuit modeling Mathematical model Packaging Semiconductor device modeling Substrates |
| title | A compact system-level simulation method for modern microelectronic packaging |
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