A highly scalable 8-layer 3D vertical-gate (VG) TFT NAND Flash using junction-free buried channel BE-SONOS device

An 8-layer, 75 nm half-pitch, 3D stacked vertical-gate (VG) TFT BE-SONOS NAND Flash array is fabricated and characterized. We propose a buried-channel (n-type well) device to improve the read current of TFT NAND, and it also allows the junction-free structure which is particularly important for 3D s...

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Hauptverfasser: Hang-Ting Lue, Tzu-Hsuan Hsu, Yi-Hsuan Hsiao, Hong, S P, Wu, M T, Hsu, F H, Lien, N Z, Szu-Yu Wang, Jung-Yu Hsieh, Ling-Wu Yang, Yang, Tahone, Kuang-Chao Chen, Kuang-Yeu Hsieh, Chih-Yuan Lu
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creator Hang-Ting Lue
Tzu-Hsuan Hsu
Yi-Hsuan Hsiao
Hong, S P
Wu, M T
Hsu, F H
Lien, N Z
Szu-Yu Wang
Jung-Yu Hsieh
Ling-Wu Yang
Yang, Tahone
Kuang-Chao Chen
Kuang-Yeu Hsieh
Chih-Yuan Lu
description An 8-layer, 75 nm half-pitch, 3D stacked vertical-gate (VG) TFT BE-SONOS NAND Flash array is fabricated and characterized. We propose a buried-channel (n-type well) device to improve the read current of TFT NAND, and it also allows the junction-free structure which is particularly important for 3D stackable devices. Large self-boosting disturb-free memory window (6V) can be obtained in our device, and for the first time the "Z-interference" between adjacent vertical layers is studied. The proposed buried-channel VG NAND allows better X, Y pitch scaling and is a very attractive candidate for ultra high-density 3D stackable NAND Flash.
doi_str_mv 10.1109/VLSIT.2010.5556199
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Arrays
Interference
Logic gates
Programming
Thin film transistors
Three dimensional displays
title A highly scalable 8-layer 3D vertical-gate (VG) TFT NAND Flash using junction-free buried channel BE-SONOS device
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