A high-gain, low-power CMOS op amp using composite cascode stages

This work demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high-gain (110 dB), low-power op amp (27.8 μW). The circuit can be fabricated without adding a compensation capacitance. Advantages of this architecture include high vo...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Comer, D J, Comer, D T, Singh, R P
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 603
container_issue
container_start_page 600
container_title
container_volume
creator Comer, D J
Comer, D T
Singh, R P
description This work demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high-gain (110 dB), low-power op amp (27.8 μW). The circuit can be fabricated without adding a compensation capacitance. Advantages of this architecture include high voltage gain, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for low-power instrumentation applications requiring multiple amplifiers as often found in biomedical applications.
doi_str_mv 10.1109/MWSCAS.2010.5548897
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5548897</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5548897</ieee_id><sourcerecordid>5548897</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-4ef33eb5044fa99bd8591544c23478710b00120e6a293f5af845fb30174ae8023</originalsourceid><addsrcrecordid>eNpFkF1LwzAYheMXuE1_wW7yA8zMx5sluSzFqbCxiypejrR700XWtTST4b-34sCrA-eBw8MhZCr4TAjuHlcfRZ4VM8mHQmuw1pkLMhYgAYwxSl-SkdDaMmWdu_oHwl3_AhiAgfktGaf0yblUAxiRLKO7WO9Y7ePhge7bE-vaE_Y0X60L2nbUNx39SvFQ06ptujbFI9LKp6rdIk1HX2O6IzfB7xPen3NC3hdPb_kLW66fX_NsyaIw-sgAg1JYag4QvHPl1mo3SEElFRhrBC85F5Lj3EungvbBgg6l4sKARzvoTsj0bzci4qbrY-P77835B_UDw5ZL5A</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A high-gain, low-power CMOS op amp using composite cascode stages</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Comer, D J ; Comer, D T ; Singh, R P</creator><creatorcontrib>Comer, D J ; Comer, D T ; Singh, R P</creatorcontrib><description>This work demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high-gain (110 dB), low-power op amp (27.8 μW). The circuit can be fabricated without adding a compensation capacitance. Advantages of this architecture include high voltage gain, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for low-power instrumentation applications requiring multiple amplifiers as often found in biomedical applications.</description><identifier>ISSN: 1548-3746</identifier><identifier>ISBN: 1424477719</identifier><identifier>ISBN: 9781424477715</identifier><identifier>EISSN: 1558-3899</identifier><identifier>EISBN: 1424477735</identifier><identifier>EISBN: 9781424477722</identifier><identifier>EISBN: 1424477727</identifier><identifier>EISBN: 9781424477739</identifier><identifier>DOI: 10.1109/MWSCAS.2010.5548897</identifier><language>eng</language><publisher>IEEE</publisher><subject>Bandwidth ; Bipolar integrated circuits ; Bipolar transistor circuits ; Capacitance ; Capacitors ; Frequency ; Harmonic distortion ; Instruments ; Low voltage ; Operational amplifiers</subject><ispartof>2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 2010, p.600-603</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5548897$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5548897$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Comer, D J</creatorcontrib><creatorcontrib>Comer, D T</creatorcontrib><creatorcontrib>Singh, R P</creatorcontrib><title>A high-gain, low-power CMOS op amp using composite cascode stages</title><title>2010 53rd IEEE International Midwest Symposium on Circuits and Systems</title><addtitle>MWSCAS</addtitle><description>This work demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high-gain (110 dB), low-power op amp (27.8 μW). The circuit can be fabricated without adding a compensation capacitance. Advantages of this architecture include high voltage gain, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for low-power instrumentation applications requiring multiple amplifiers as often found in biomedical applications.</description><subject>Bandwidth</subject><subject>Bipolar integrated circuits</subject><subject>Bipolar transistor circuits</subject><subject>Capacitance</subject><subject>Capacitors</subject><subject>Frequency</subject><subject>Harmonic distortion</subject><subject>Instruments</subject><subject>Low voltage</subject><subject>Operational amplifiers</subject><issn>1548-3746</issn><issn>1558-3899</issn><isbn>1424477719</isbn><isbn>9781424477715</isbn><isbn>1424477735</isbn><isbn>9781424477722</isbn><isbn>1424477727</isbn><isbn>9781424477739</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkF1LwzAYheMXuE1_wW7yA8zMx5sluSzFqbCxiypejrR700XWtTST4b-34sCrA-eBw8MhZCr4TAjuHlcfRZ4VM8mHQmuw1pkLMhYgAYwxSl-SkdDaMmWdu_oHwl3_AhiAgfktGaf0yblUAxiRLKO7WO9Y7ePhge7bE-vaE_Y0X60L2nbUNx39SvFQ06ptujbFI9LKp6rdIk1HX2O6IzfB7xPen3NC3hdPb_kLW66fX_NsyaIw-sgAg1JYag4QvHPl1mo3SEElFRhrBC85F5Lj3EungvbBgg6l4sKARzvoTsj0bzci4qbrY-P77835B_UDw5ZL5A</recordid><startdate>201008</startdate><enddate>201008</enddate><creator>Comer, D J</creator><creator>Comer, D T</creator><creator>Singh, R P</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201008</creationdate><title>A high-gain, low-power CMOS op amp using composite cascode stages</title><author>Comer, D J ; Comer, D T ; Singh, R P</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-4ef33eb5044fa99bd8591544c23478710b00120e6a293f5af845fb30174ae8023</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Bandwidth</topic><topic>Bipolar integrated circuits</topic><topic>Bipolar transistor circuits</topic><topic>Capacitance</topic><topic>Capacitors</topic><topic>Frequency</topic><topic>Harmonic distortion</topic><topic>Instruments</topic><topic>Low voltage</topic><topic>Operational amplifiers</topic><toplevel>online_resources</toplevel><creatorcontrib>Comer, D J</creatorcontrib><creatorcontrib>Comer, D T</creatorcontrib><creatorcontrib>Singh, R P</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Comer, D J</au><au>Comer, D T</au><au>Singh, R P</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A high-gain, low-power CMOS op amp using composite cascode stages</atitle><btitle>2010 53rd IEEE International Midwest Symposium on Circuits and Systems</btitle><stitle>MWSCAS</stitle><date>2010-08</date><risdate>2010</risdate><spage>600</spage><epage>603</epage><pages>600-603</pages><issn>1548-3746</issn><eissn>1558-3899</eissn><isbn>1424477719</isbn><isbn>9781424477715</isbn><eisbn>1424477735</eisbn><eisbn>9781424477722</eisbn><eisbn>1424477727</eisbn><eisbn>9781424477739</eisbn><abstract>This work demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high-gain (110 dB), low-power op amp (27.8 μW). The circuit can be fabricated without adding a compensation capacitance. Advantages of this architecture include high voltage gain, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for low-power instrumentation applications requiring multiple amplifiers as often found in biomedical applications.</abstract><pub>IEEE</pub><doi>10.1109/MWSCAS.2010.5548897</doi><tpages>4</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 1548-3746
ispartof 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 2010, p.600-603
issn 1548-3746
1558-3899
language eng
recordid cdi_ieee_primary_5548897
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Bandwidth
Bipolar integrated circuits
Bipolar transistor circuits
Capacitance
Capacitors
Frequency
Harmonic distortion
Instruments
Low voltage
Operational amplifiers
title A high-gain, low-power CMOS op amp using composite cascode stages
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T11%3A39%3A21IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20high-gain,%20low-power%20CMOS%20op%20amp%20using%20composite%20cascode%20stages&rft.btitle=2010%2053rd%20IEEE%20International%20Midwest%20Symposium%20on%20Circuits%20and%20Systems&rft.au=Comer,%20D%20J&rft.date=2010-08&rft.spage=600&rft.epage=603&rft.pages=600-603&rft.issn=1548-3746&rft.eissn=1558-3899&rft.isbn=1424477719&rft.isbn_list=9781424477715&rft_id=info:doi/10.1109/MWSCAS.2010.5548897&rft_dat=%3Cieee_6IE%3E5548897%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1424477735&rft.eisbn_list=9781424477722&rft.eisbn_list=1424477727&rft.eisbn_list=9781424477739&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5548897&rfr_iscdi=true