A 22.4 mW competitive fuzzy edge detection processor for volume rendering

A 22.4 mW competitive fuzzy edge detection processor for volume rendering

A low power competitive fuzzy edge detection (C-FED) processor is proposed for gradient calculations in volume rendering. Its linearized fuzzy membership function reduces overall power by 35.1% and the proposed hardware sharing between computation stages reduces power consumption by 18%. Threshold a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Joonsoo Kwon, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Adaptive control
CMOS process
Energy consumption
Hardware
Image edge detection
Noise robustness
Pixel
Power engineering computing
Programmable control
Rendering (computer graphics)
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 1886
container_issue
container_start_page 1883
container_title
container_volume
creator Joonsoo Kwon
Minsu Kim
Jinwook Oh
Hoi-Jun Yoo
description A low power competitive fuzzy edge detection (C-FED) processor is proposed for gradient calculations in volume rendering. Its linearized fuzzy membership function reduces overall power by 35.1% and the proposed hardware sharing between computation stages reduces power consumption by 18%. Threshold adaptive bit control scheme is proposed to predetermine background pixel with simple operation which results in 13% power reduction. Overall power consumption is reduced by 53.8%. Its power consumption and energy per pixel is 22.4 mW and 0.14nJ/pixel, respectively, at 1.8-V supply. The fabricated processor occupying 450 μm × 450 μm in a 0.18 μm CMOS process achieves 1821.5fps for the input image of 300 × 300 pixels at 200 MHz operating frequency.
doi_str_mv 10.1109/ISCAS.2010.5537899
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5537899</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5537899</ieee_id><sourcerecordid>5537899</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-5d0a5a43ed499544fa760254cee3bc1ecf950661e025f216c1c96058b430c5753</originalsourceid><addsrcrecordid>eNo1UMlqwzAUVJdA3dQ_0F70A3K1Pck6GtPFEOghLT0GR34OKvGC7QSSr6-h6YNhmBkYmEfIo-CJENw9F-s8WyeSzxpA2dS5KxI7mwottQbFnbwmkRSQMgESbsj9f5C6WxJxaQXTissFiVLOjDZzckficfzh82mQRtmIFBmVMtG0-aa-a3qcwhSOSOvD-XyiWO2QVjihn0LX0n7oPI5jN9B6xrHbHxqkA7YVDqHdPZBFXe5HjC-8JF-vL5_5O1t9vBV5tmJBWJgYVLyEUiustHOgdV1awyVoj6i2XqCvHXBjBM5mLYXxwjvDId3OWzxYUEvy9NcbEHHTD6Eph9Pm8iH1C0NYUmM</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A 22.4 mW competitive fuzzy edge detection processor for volume rendering</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Joonsoo Kwon ; Minsu Kim ; Jinwook Oh ; Hoi-Jun Yoo</creator><creatorcontrib>Joonsoo Kwon ; Minsu Kim ; Jinwook Oh ; Hoi-Jun Yoo</creatorcontrib><description>A low power competitive fuzzy edge detection (C-FED) processor is proposed for gradient calculations in volume rendering. Its linearized fuzzy membership function reduces overall power by 35.1% and the proposed hardware sharing between computation stages reduces power consumption by 18%. Threshold adaptive bit control scheme is proposed to predetermine background pixel with simple operation which results in 13% power reduction. Overall power consumption is reduced by 53.8%. Its power consumption and energy per pixel is 22.4 mW and 0.14nJ/pixel, respectively, at 1.8-V supply. The fabricated processor occupying 450 μm × 450 μm in a 0.18 μm CMOS process achieves 1821.5fps for the input image of 300 × 300 pixels at 200 MHz operating frequency.</description><identifier>ISSN: 0271-4302</identifier><identifier>ISBN: 1424453089</identifier><identifier>ISBN: 9781424453085</identifier><identifier>EISSN: 2158-1525</identifier><identifier>EISBN: 9781424453092</identifier><identifier>EISBN: 1424453097</identifier><identifier>DOI: 10.1109/ISCAS.2010.5537899</identifier><identifier>LCCN: 80-646530</identifier><language>eng</language><publisher>IEEE</publisher><subject>Adaptive control ; CMOS process ; Energy consumption ; Hardware ; Image edge detection ; Noise robustness ; Pixel ; Power engineering computing ; Programmable control ; Rendering (computer graphics)</subject><ispartof>2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, p.1883-1886</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5537899$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5537899$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Joonsoo Kwon</creatorcontrib><creatorcontrib>Minsu Kim</creatorcontrib><creatorcontrib>Jinwook Oh</creatorcontrib><creatorcontrib>Hoi-Jun Yoo</creatorcontrib><title>A 22.4 mW competitive fuzzy edge detection processor for volume rendering</title><title>2010 IEEE International Symposium on Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>A low power competitive fuzzy edge detection (C-FED) processor is proposed for gradient calculations in volume rendering. Its linearized fuzzy membership function reduces overall power by 35.1% and the proposed hardware sharing between computation stages reduces power consumption by 18%. Threshold adaptive bit control scheme is proposed to predetermine background pixel with simple operation which results in 13% power reduction. Overall power consumption is reduced by 53.8%. Its power consumption and energy per pixel is 22.4 mW and 0.14nJ/pixel, respectively, at 1.8-V supply. The fabricated processor occupying 450 μm × 450 μm in a 0.18 μm CMOS process achieves 1821.5fps for the input image of 300 × 300 pixels at 200 MHz operating frequency.</description><subject>Adaptive control</subject><subject>CMOS process</subject><subject>Energy consumption</subject><subject>Hardware</subject><subject>Image edge detection</subject><subject>Noise robustness</subject><subject>Pixel</subject><subject>Power engineering computing</subject><subject>Programmable control</subject><subject>Rendering (computer graphics)</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>1424453089</isbn><isbn>9781424453085</isbn><isbn>9781424453092</isbn><isbn>1424453097</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1UMlqwzAUVJdA3dQ_0F70A3K1Pck6GtPFEOghLT0GR34OKvGC7QSSr6-h6YNhmBkYmEfIo-CJENw9F-s8WyeSzxpA2dS5KxI7mwottQbFnbwmkRSQMgESbsj9f5C6WxJxaQXTissFiVLOjDZzckficfzh82mQRtmIFBmVMtG0-aa-a3qcwhSOSOvD-XyiWO2QVjihn0LX0n7oPI5jN9B6xrHbHxqkA7YVDqHdPZBFXe5HjC-8JF-vL5_5O1t9vBV5tmJBWJgYVLyEUiustHOgdV1awyVoj6i2XqCvHXBjBM5mLYXxwjvDId3OWzxYUEvy9NcbEHHTD6Eph9Pm8iH1C0NYUmM</recordid><startdate>201005</startdate><enddate>201005</enddate><creator>Joonsoo Kwon</creator><creator>Minsu Kim</creator><creator>Jinwook Oh</creator><creator>Hoi-Jun Yoo</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201005</creationdate><title>A 22.4 mW competitive fuzzy edge detection processor for volume rendering</title><author>Joonsoo Kwon ; Minsu Kim ; Jinwook Oh ; Hoi-Jun Yoo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-5d0a5a43ed499544fa760254cee3bc1ecf950661e025f216c1c96058b430c5753</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Adaptive control</topic><topic>CMOS process</topic><topic>Energy consumption</topic><topic>Hardware</topic><topic>Image edge detection</topic><topic>Noise robustness</topic><topic>Pixel</topic><topic>Power engineering computing</topic><topic>Programmable control</topic><topic>Rendering (computer graphics)</topic><toplevel>online_resources</toplevel><creatorcontrib>Joonsoo Kwon</creatorcontrib><creatorcontrib>Minsu Kim</creatorcontrib><creatorcontrib>Jinwook Oh</creatorcontrib><creatorcontrib>Hoi-Jun Yoo</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Joonsoo Kwon</au><au>Minsu Kim</au><au>Jinwook Oh</au><au>Hoi-Jun Yoo</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 22.4 mW competitive fuzzy edge detection processor for volume rendering</atitle><btitle>2010 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2010-05</date><risdate>2010</risdate><spage>1883</spage><epage>1886</epage><pages>1883-1886</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>1424453089</isbn><isbn>9781424453085</isbn><eisbn>9781424453092</eisbn><eisbn>1424453097</eisbn><abstract>A low power competitive fuzzy edge detection (C-FED) processor is proposed for gradient calculations in volume rendering. Its linearized fuzzy membership function reduces overall power by 35.1% and the proposed hardware sharing between computation stages reduces power consumption by 18%. Threshold adaptive bit control scheme is proposed to predetermine background pixel with simple operation which results in 13% power reduction. Overall power consumption is reduced by 53.8%. Its power consumption and energy per pixel is 22.4 mW and 0.14nJ/pixel, respectively, at 1.8-V supply. The fabricated processor occupying 450 μm × 450 μm in a 0.18 μm CMOS process achieves 1821.5fps for the input image of 300 × 300 pixels at 200 MHz operating frequency.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2010.5537899</doi><tpages>4</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0271-4302
ispartof 2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, p.1883-1886
issn 0271-4302
2158-1525
language eng
recordid cdi_ieee_primary_5537899
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Adaptive control
CMOS process
Energy consumption
Hardware
Image edge detection
Noise robustness
Pixel
Power engineering computing
Programmable control
Rendering (computer graphics)
title A 22.4 mW competitive fuzzy edge detection processor for volume rendering
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T10%3A05%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%2022.4%20mW%20competitive%20fuzzy%20edge%20detection%20processor%20for%20volume%20rendering&rft.btitle=2010%20IEEE%20International%20Symposium%20on%20Circuits%20and%20Systems%20(ISCAS)&rft.au=Joonsoo%20Kwon&rft.date=2010-05&rft.spage=1883&rft.epage=1886&rft.pages=1883-1886&rft.issn=0271-4302&rft.eissn=2158-1525&rft.isbn=1424453089&rft.isbn_list=9781424453085&rft_id=info:doi/10.1109/ISCAS.2010.5537899&rft_dat=%3Cieee_6IE%3E5537899%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9781424453092&rft.eisbn_list=1424453097&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5537899&rfr_iscdi=true