A novel multiplying D/A converter stage with low sensitivity to amplifier gain

A novel multiplying D/A converter stage with low sensitivity to amplifier gain

A multiplying D/A converter stage incorporating a novel technique for compensating the residual error due to finite amplifier gain is proposed. The scheme is suitable for deep-submicron CMOS technologies and is advantageous compared to the available correlated double sampling techniques because it n...

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Hauptverfasser: Isa, E N, Morche, D, Dehollain, C
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Bandwidth
Capacitance
Capacitors
CMOS technology
Energy consumption
Power amplifiers
Signal processing
Signal sampling
Virtual reality
Voltage
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Morche, D
Dehollain, C
description A multiplying D/A converter stage incorporating a novel technique for compensating the residual error due to finite amplifier gain is proposed. The scheme is suitable for deep-submicron CMOS technologies and is advantageous compared to the available correlated double sampling techniques because it neither doubles the size of the sampling capacitance, nor requires processing of the same input signal twice for cancelling the residual error at the virtual ground. The conducted behavioral simulations confirm the efficiency of the proposed technique applied to a pipelined A/D converter.
doi_str_mv 10.1109/ISCAS.2010.5537635
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Bandwidth
Capacitance
Capacitors
CMOS technology
Energy consumption
Power amplifiers
Signal processing
Signal sampling
Virtual reality
Voltage
title A novel multiplying D/A converter stage with low sensitivity to amplifier gain
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