Apply genetic algorithm to minimize the overkills in wafer probe testing
In this paper, an ordinal optimization (OO) based algorithm is applied to minimize the overkills under a tolerable level of re-probes in a wafer probe testing process, which is formulated as a constrained stochastic simulation optimization problem that consists of a huge input-variable space formed...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 598 |
---|---|
container_issue | |
container_start_page | 593 |
container_title | |
container_volume | |
creator | Shih-Cheng Horng Han-Tang Tsou |
description | In this paper, an ordinal optimization (OO) based algorithm is applied to minimize the overkills under a tolerable level of re-probes in a wafer probe testing process, which is formulated as a constrained stochastic simulation optimization problem that consists of a huge input-variable space formed by the vector of threshold values in the testing process. First, we construct a crude but effective model based on a shorter stochastic simulation with a small amount of test wafers. This crude model will then be used as a fitness function evaluation in the genetic algorithm to select N good enough solutions. Then, starting from the selected N good enough solutions we proceed with the goal softening searching procedures to search for a good enough solution. Applying to a real semiconductor product, the vector of good enough threshold values obtained by the proposed algorithm is promising in the aspects of solution quality and computational efficiency. We also demonstrate the computational efficiency of the proposed algorithm by comparing with the genetic algorithm and the evolution strategy. |
doi_str_mv | 10.1109/ICIEA.2010.5517052 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5517052</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5517052</ieee_id><sourcerecordid>5517052</sourcerecordid><originalsourceid>FETCH-LOGICAL-i1342-6e5d6bdaa016260448a29255e96758ca3fa5949ba531312b8c0d19ee5aa0e02e3</originalsourceid><addsrcrecordid>eNpFkM1OwzAQhM1PJdrSF4CLXyBlvfY68bGqWlqpEhc4V06zaQ35UxKBytMTQSXmMhp9mjmMEA8K5kqBe9out6vFHGHIRCoGwisxUQaNITAWr8UYFSURootv_gGZ219gI9QqGYkJAjgHMSTqTsy67h0GGULCeCw2i6YpzvLIFffhIH1xrNvQn0rZ17IMVSjDN8v-xLL-5PYjFEUnQyW_fM6tbNo6HSB3faiO92KU-6Lj2cWn4m29el1uot3L83a52EVBaYORZcpsmnkPyqIFYxKPDonY2ZiSg9e5J2dc6kkrrTBNDpApx0xDgwFZT8Xj325g5n3ThtK35_3lHv0DzvVSRQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Apply genetic algorithm to minimize the overkills in wafer probe testing</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Shih-Cheng Horng ; Han-Tang Tsou</creator><creatorcontrib>Shih-Cheng Horng ; Han-Tang Tsou</creatorcontrib><description>In this paper, an ordinal optimization (OO) based algorithm is applied to minimize the overkills under a tolerable level of re-probes in a wafer probe testing process, which is formulated as a constrained stochastic simulation optimization problem that consists of a huge input-variable space formed by the vector of threshold values in the testing process. First, we construct a crude but effective model based on a shorter stochastic simulation with a small amount of test wafers. This crude model will then be used as a fitness function evaluation in the genetic algorithm to select N good enough solutions. Then, starting from the selected N good enough solutions we proceed with the goal softening searching procedures to search for a good enough solution. Applying to a real semiconductor product, the vector of good enough threshold values obtained by the proposed algorithm is promising in the aspects of solution quality and computational efficiency. We also demonstrate the computational efficiency of the proposed algorithm by comparing with the genetic algorithm and the evolution strategy.</description><identifier>ISSN: 2156-2318</identifier><identifier>ISBN: 1424450454</identifier><identifier>ISBN: 9781424450459</identifier><identifier>EISSN: 2158-2297</identifier><identifier>EISBN: 1424450462</identifier><identifier>EISBN: 9781424450466</identifier><identifier>DOI: 10.1109/ICIEA.2010.5517052</identifier><identifier>LCCN: 2009907081</identifier><language>eng</language><publisher>IEEE</publisher><subject>Chaos ; Circuit testing ; Computer science ; Constraint optimization ; genetic algorithm ; Genetic algorithms ; Manufacturing processes ; ordinal optimization ; overkill ; Probes ; re-probe ; Space technology ; Stochastic processes ; Throughput ; wafer probe testing</subject><ispartof>2010 5th IEEE Conference on Industrial Electronics and Applications, 2010, p.593-598</ispartof><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5517052$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5517052$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Shih-Cheng Horng</creatorcontrib><creatorcontrib>Han-Tang Tsou</creatorcontrib><title>Apply genetic algorithm to minimize the overkills in wafer probe testing</title><title>2010 5th IEEE Conference on Industrial Electronics and Applications</title><addtitle>ICIEA</addtitle><description>In this paper, an ordinal optimization (OO) based algorithm is applied to minimize the overkills under a tolerable level of re-probes in a wafer probe testing process, which is formulated as a constrained stochastic simulation optimization problem that consists of a huge input-variable space formed by the vector of threshold values in the testing process. First, we construct a crude but effective model based on a shorter stochastic simulation with a small amount of test wafers. This crude model will then be used as a fitness function evaluation in the genetic algorithm to select N good enough solutions. Then, starting from the selected N good enough solutions we proceed with the goal softening searching procedures to search for a good enough solution. Applying to a real semiconductor product, the vector of good enough threshold values obtained by the proposed algorithm is promising in the aspects of solution quality and computational efficiency. We also demonstrate the computational efficiency of the proposed algorithm by comparing with the genetic algorithm and the evolution strategy.</description><subject>Chaos</subject><subject>Circuit testing</subject><subject>Computer science</subject><subject>Constraint optimization</subject><subject>genetic algorithm</subject><subject>Genetic algorithms</subject><subject>Manufacturing processes</subject><subject>ordinal optimization</subject><subject>overkill</subject><subject>Probes</subject><subject>re-probe</subject><subject>Space technology</subject><subject>Stochastic processes</subject><subject>Throughput</subject><subject>wafer probe testing</subject><issn>2156-2318</issn><issn>2158-2297</issn><isbn>1424450454</isbn><isbn>9781424450459</isbn><isbn>1424450462</isbn><isbn>9781424450466</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkM1OwzAQhM1PJdrSF4CLXyBlvfY68bGqWlqpEhc4V06zaQ35UxKBytMTQSXmMhp9mjmMEA8K5kqBe9out6vFHGHIRCoGwisxUQaNITAWr8UYFSURootv_gGZ219gI9QqGYkJAjgHMSTqTsy67h0GGULCeCw2i6YpzvLIFffhIH1xrNvQn0rZ17IMVSjDN8v-xLL-5PYjFEUnQyW_fM6tbNo6HSB3faiO92KU-6Lj2cWn4m29el1uot3L83a52EVBaYORZcpsmnkPyqIFYxKPDonY2ZiSg9e5J2dc6kkrrTBNDpApx0xDgwFZT8Xj325g5n3ThtK35_3lHv0DzvVSRQ</recordid><startdate>201006</startdate><enddate>201006</enddate><creator>Shih-Cheng Horng</creator><creator>Han-Tang Tsou</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201006</creationdate><title>Apply genetic algorithm to minimize the overkills in wafer probe testing</title><author>Shih-Cheng Horng ; Han-Tang Tsou</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i1342-6e5d6bdaa016260448a29255e96758ca3fa5949ba531312b8c0d19ee5aa0e02e3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Chaos</topic><topic>Circuit testing</topic><topic>Computer science</topic><topic>Constraint optimization</topic><topic>genetic algorithm</topic><topic>Genetic algorithms</topic><topic>Manufacturing processes</topic><topic>ordinal optimization</topic><topic>overkill</topic><topic>Probes</topic><topic>re-probe</topic><topic>Space technology</topic><topic>Stochastic processes</topic><topic>Throughput</topic><topic>wafer probe testing</topic><toplevel>online_resources</toplevel><creatorcontrib>Shih-Cheng Horng</creatorcontrib><creatorcontrib>Han-Tang Tsou</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shih-Cheng Horng</au><au>Han-Tang Tsou</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Apply genetic algorithm to minimize the overkills in wafer probe testing</atitle><btitle>2010 5th IEEE Conference on Industrial Electronics and Applications</btitle><stitle>ICIEA</stitle><date>2010-06</date><risdate>2010</risdate><spage>593</spage><epage>598</epage><pages>593-598</pages><issn>2156-2318</issn><eissn>2158-2297</eissn><isbn>1424450454</isbn><isbn>9781424450459</isbn><eisbn>1424450462</eisbn><eisbn>9781424450466</eisbn><abstract>In this paper, an ordinal optimization (OO) based algorithm is applied to minimize the overkills under a tolerable level of re-probes in a wafer probe testing process, which is formulated as a constrained stochastic simulation optimization problem that consists of a huge input-variable space formed by the vector of threshold values in the testing process. First, we construct a crude but effective model based on a shorter stochastic simulation with a small amount of test wafers. This crude model will then be used as a fitness function evaluation in the genetic algorithm to select N good enough solutions. Then, starting from the selected N good enough solutions we proceed with the goal softening searching procedures to search for a good enough solution. Applying to a real semiconductor product, the vector of good enough threshold values obtained by the proposed algorithm is promising in the aspects of solution quality and computational efficiency. We also demonstrate the computational efficiency of the proposed algorithm by comparing with the genetic algorithm and the evolution strategy.</abstract><pub>IEEE</pub><doi>10.1109/ICIEA.2010.5517052</doi><tpages>6</tpages><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 2156-2318 |
ispartof | 2010 5th IEEE Conference on Industrial Electronics and Applications, 2010, p.593-598 |
issn | 2156-2318 2158-2297 |
language | eng |
recordid | cdi_ieee_primary_5517052 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Chaos Circuit testing Computer science Constraint optimization genetic algorithm Genetic algorithms Manufacturing processes ordinal optimization overkill Probes re-probe Space technology Stochastic processes Throughput wafer probe testing |
title | Apply genetic algorithm to minimize the overkills in wafer probe testing |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T10%3A11%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Apply%20genetic%20algorithm%20to%20minimize%20the%20overkills%20in%20wafer%20probe%20testing&rft.btitle=2010%205th%20IEEE%20Conference%20on%20Industrial%20Electronics%20and%20Applications&rft.au=Shih-Cheng%20Horng&rft.date=2010-06&rft.spage=593&rft.epage=598&rft.pages=593-598&rft.issn=2156-2318&rft.eissn=2158-2297&rft.isbn=1424450454&rft.isbn_list=9781424450459&rft_id=info:doi/10.1109/ICIEA.2010.5517052&rft_dat=%3Cieee_6IE%3E5517052%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1424450462&rft.eisbn_list=9781424450466&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5517052&rfr_iscdi=true |