A sub-resonant 40GHz clock distribution network with near zero skew
A sub-resonant mm-wave clock distribution network is presented. The proposed solution introduces near zero skew while consumes significantly less power than alternative approaches such as mesh networks. The clock distribution network was implemented using the TSMC 40 nm LP CMOS process and measured...
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creator | Aryanfar, Farshid Ting Wu Koochakzadeh, Masoud Werner, Carl Ken Chang |
description | A sub-resonant mm-wave clock distribution network is presented. The proposed solution introduces near zero skew while consumes significantly less power than alternative approaches such as mesh networks. The clock distribution network was implemented using the TSMC 40 nm LP CMOS process and measured using a 4-port vector network analyzer. It measures sub-psec skew from 36.6 to 40.2 GHz with less than 20% power penalty compared to resonant solutions. |
doi_str_mv | 10.1109/MWSYM.2010.5515024 |
format | Conference Proceeding |
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The proposed solution introduces near zero skew while consumes significantly less power than alternative approaches such as mesh networks. The clock distribution network was implemented using the TSMC 40 nm LP CMOS process and measured using a 4-port vector network analyzer. It measures sub-psec skew from 36.6 to 40.2 GHz with less than 20% power penalty compared to resonant solutions.</abstract><pub>IEEE</pub><doi>10.1109/MWSYM.2010.5515024</doi><tpages>4</tpages></addata></record> |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Active delay-line Bandwidth Capacitance clock network Clocks CMOS process delay line Frequency Jitter Power measurement Resonance skew transmission line Transmission line measurements Wiring |
title | A sub-resonant 40GHz clock distribution network with near zero skew |
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