Towards logic functions as the device
This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions are possible initial candidates to create such...
Gespeichert in:
Hauptverfasser: | , , , , , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 16 |
---|---|
container_issue | |
container_start_page | 11 |
container_title | |
container_volume | |
creator | Shabadi, Prasad Khitun, Alexander Narayanan, Pritish Mingqiang Bao Koren, Israel Wang, Kang L Moritz, C Andras |
description | This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions are possible initial candidates to create such new devices. The paper focuses on magnon-based spin-wave-logic functions (SPWF) and presents high fan-in majority, weighted high fan-in majority, and frequency-multiplexed weighted high fan-in majority devices as initial SPWFs. Experiments proving feasibility are also shown. Benefits vs. scaled CMOS are quantified. Results show that for 128 or larger inputs even a 2.5μm SPWF carry-look-ahead adder implementation is faster than the 45nm CMOS version. The 45nm SPWF adder is expected to be significantly faster across the whole range of input widths. In particular, the 45nm SPWF CLA adder is estimated to be at least 77X faster than CMOS version for input widths equal to or greater than 1024. A second example of a counter circuit is presented to illustrate the considerable reduction in complexity possible vs. CMOS. |
doi_str_mv | 10.1109/NANOARCH.2010.5510934 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5510934</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5510934</ieee_id><sourcerecordid>5510934</sourcerecordid><originalsourceid>FETCH-LOGICAL-i1374-ce2e88adc6cf2764ec4db960ce210102fb7d88d5dd138ef3f6aefe6f8aac16cd3</originalsourceid><addsrcrecordid>eNo9j01LAzEUReMXWOv8AhGycTk17yWTZJbDoFYoLUhdlzR50UjtyKQq_nsHHFxdOAcu9zJ2DWIGIOrbZbNcNU_tfIZiQFU1MKmO2AUoVMoKqOGYTVCiKS2iPmFFbezoUMjTfwf2nBU5vwkxcAGgqgm7WXffrg-Z77qX5Hn83PtD6vaZu8wPr8QDfSVPl-wsul2mYswpe76_W7fzcrF6eGybRZlAGlV6QrLWBa99RKMVeRW2tRYDh2E6xq0J1oYqBJCWoozaUSQdrXMetA9yyq7-ehMRbT769O76n834WP4CIKpGPg</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Towards logic functions as the device</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Shabadi, Prasad ; Khitun, Alexander ; Narayanan, Pritish ; Mingqiang Bao ; Koren, Israel ; Wang, Kang L ; Moritz, C Andras</creator><creatorcontrib>Shabadi, Prasad ; Khitun, Alexander ; Narayanan, Pritish ; Mingqiang Bao ; Koren, Israel ; Wang, Kang L ; Moritz, C Andras</creatorcontrib><description>This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions are possible initial candidates to create such new devices. The paper focuses on magnon-based spin-wave-logic functions (SPWF) and presents high fan-in majority, weighted high fan-in majority, and frequency-multiplexed weighted high fan-in majority devices as initial SPWFs. Experiments proving feasibility are also shown. Benefits vs. scaled CMOS are quantified. Results show that for 128 or larger inputs even a 2.5μm SPWF carry-look-ahead adder implementation is faster than the 45nm CMOS version. The 45nm SPWF adder is expected to be significantly faster across the whole range of input widths. In particular, the 45nm SPWF CLA adder is estimated to be at least 77X faster than CMOS version for input widths equal to or greater than 1024. A second example of a counter circuit is presented to illustrate the considerable reduction in complexity possible vs. CMOS.</description><identifier>ISSN: 2327-8218</identifier><identifier>ISBN: 9781424480203</identifier><identifier>ISBN: 1424480205</identifier><identifier>EISSN: 2327-8226</identifier><identifier>EISBN: 1424480191</identifier><identifier>EISBN: 9781424480197</identifier><identifier>EISBN: 9781424480180</identifier><identifier>EISBN: 1424480183</identifier><identifier>DOI: 10.1109/NANOARCH.2010.5510934</identifier><language>eng</language><publisher>IEEE</publisher><subject>Adders ; Arithmetic ; CMOS logic circuits ; Delay ; Fabrics ; high functionality devices ; Logic devices ; Logic functions ; Nanoscale devices ; nanoscale fabrics ; spin wave functions ; state variables ; Switches ; Wave functions</subject><ispartof>2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010, p.11-16</ispartof><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5510934$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5510934$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Shabadi, Prasad</creatorcontrib><creatorcontrib>Khitun, Alexander</creatorcontrib><creatorcontrib>Narayanan, Pritish</creatorcontrib><creatorcontrib>Mingqiang Bao</creatorcontrib><creatorcontrib>Koren, Israel</creatorcontrib><creatorcontrib>Wang, Kang L</creatorcontrib><creatorcontrib>Moritz, C Andras</creatorcontrib><title>Towards logic functions as the device</title><title>2010 IEEE/ACM International Symposium on Nanoscale Architectures</title><addtitle>NANOARCH</addtitle><description>This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions are possible initial candidates to create such new devices. The paper focuses on magnon-based spin-wave-logic functions (SPWF) and presents high fan-in majority, weighted high fan-in majority, and frequency-multiplexed weighted high fan-in majority devices as initial SPWFs. Experiments proving feasibility are also shown. Benefits vs. scaled CMOS are quantified. Results show that for 128 or larger inputs even a 2.5μm SPWF carry-look-ahead adder implementation is faster than the 45nm CMOS version. The 45nm SPWF adder is expected to be significantly faster across the whole range of input widths. In particular, the 45nm SPWF CLA adder is estimated to be at least 77X faster than CMOS version for input widths equal to or greater than 1024. A second example of a counter circuit is presented to illustrate the considerable reduction in complexity possible vs. CMOS.</description><subject>Adders</subject><subject>Arithmetic</subject><subject>CMOS logic circuits</subject><subject>Delay</subject><subject>Fabrics</subject><subject>high functionality devices</subject><subject>Logic devices</subject><subject>Logic functions</subject><subject>Nanoscale devices</subject><subject>nanoscale fabrics</subject><subject>spin wave functions</subject><subject>state variables</subject><subject>Switches</subject><subject>Wave functions</subject><issn>2327-8218</issn><issn>2327-8226</issn><isbn>9781424480203</isbn><isbn>1424480205</isbn><isbn>1424480191</isbn><isbn>9781424480197</isbn><isbn>9781424480180</isbn><isbn>1424480183</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo9j01LAzEUReMXWOv8AhGycTk17yWTZJbDoFYoLUhdlzR50UjtyKQq_nsHHFxdOAcu9zJ2DWIGIOrbZbNcNU_tfIZiQFU1MKmO2AUoVMoKqOGYTVCiKS2iPmFFbezoUMjTfwf2nBU5vwkxcAGgqgm7WXffrg-Z77qX5Hn83PtD6vaZu8wPr8QDfSVPl-wsul2mYswpe76_W7fzcrF6eGybRZlAGlV6QrLWBa99RKMVeRW2tRYDh2E6xq0J1oYqBJCWoozaUSQdrXMetA9yyq7-ehMRbT769O76n834WP4CIKpGPg</recordid><startdate>201006</startdate><enddate>201006</enddate><creator>Shabadi, Prasad</creator><creator>Khitun, Alexander</creator><creator>Narayanan, Pritish</creator><creator>Mingqiang Bao</creator><creator>Koren, Israel</creator><creator>Wang, Kang L</creator><creator>Moritz, C Andras</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201006</creationdate><title>Towards logic functions as the device</title><author>Shabadi, Prasad ; Khitun, Alexander ; Narayanan, Pritish ; Mingqiang Bao ; Koren, Israel ; Wang, Kang L ; Moritz, C Andras</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i1374-ce2e88adc6cf2764ec4db960ce210102fb7d88d5dd138ef3f6aefe6f8aac16cd3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Adders</topic><topic>Arithmetic</topic><topic>CMOS logic circuits</topic><topic>Delay</topic><topic>Fabrics</topic><topic>high functionality devices</topic><topic>Logic devices</topic><topic>Logic functions</topic><topic>Nanoscale devices</topic><topic>nanoscale fabrics</topic><topic>spin wave functions</topic><topic>state variables</topic><topic>Switches</topic><topic>Wave functions</topic><toplevel>online_resources</toplevel><creatorcontrib>Shabadi, Prasad</creatorcontrib><creatorcontrib>Khitun, Alexander</creatorcontrib><creatorcontrib>Narayanan, Pritish</creatorcontrib><creatorcontrib>Mingqiang Bao</creatorcontrib><creatorcontrib>Koren, Israel</creatorcontrib><creatorcontrib>Wang, Kang L</creatorcontrib><creatorcontrib>Moritz, C Andras</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shabadi, Prasad</au><au>Khitun, Alexander</au><au>Narayanan, Pritish</au><au>Mingqiang Bao</au><au>Koren, Israel</au><au>Wang, Kang L</au><au>Moritz, C Andras</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Towards logic functions as the device</atitle><btitle>2010 IEEE/ACM International Symposium on Nanoscale Architectures</btitle><stitle>NANOARCH</stitle><date>2010-06</date><risdate>2010</risdate><spage>11</spage><epage>16</epage><pages>11-16</pages><issn>2327-8218</issn><eissn>2327-8226</eissn><isbn>9781424480203</isbn><isbn>1424480205</isbn><eisbn>1424480191</eisbn><eisbn>9781424480197</eisbn><eisbn>9781424480180</eisbn><eisbn>1424480183</eisbn><abstract>This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions are possible initial candidates to create such new devices. The paper focuses on magnon-based spin-wave-logic functions (SPWF) and presents high fan-in majority, weighted high fan-in majority, and frequency-multiplexed weighted high fan-in majority devices as initial SPWFs. Experiments proving feasibility are also shown. Benefits vs. scaled CMOS are quantified. Results show that for 128 or larger inputs even a 2.5μm SPWF carry-look-ahead adder implementation is faster than the 45nm CMOS version. The 45nm SPWF adder is expected to be significantly faster across the whole range of input widths. In particular, the 45nm SPWF CLA adder is estimated to be at least 77X faster than CMOS version for input widths equal to or greater than 1024. A second example of a counter circuit is presented to illustrate the considerable reduction in complexity possible vs. CMOS.</abstract><pub>IEEE</pub><doi>10.1109/NANOARCH.2010.5510934</doi><tpages>6</tpages><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 2327-8218 |
ispartof | 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010, p.11-16 |
issn | 2327-8218 2327-8226 |
language | eng |
recordid | cdi_ieee_primary_5510934 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Adders Arithmetic CMOS logic circuits Delay Fabrics high functionality devices Logic devices Logic functions Nanoscale devices nanoscale fabrics spin wave functions state variables Switches Wave functions |
title | Towards logic functions as the device |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T17%3A06%3A35IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Towards%20logic%20functions%20as%20the%20device&rft.btitle=2010%20IEEE/ACM%20International%20Symposium%20on%20Nanoscale%20Architectures&rft.au=Shabadi,%20Prasad&rft.date=2010-06&rft.spage=11&rft.epage=16&rft.pages=11-16&rft.issn=2327-8218&rft.eissn=2327-8226&rft.isbn=9781424480203&rft.isbn_list=1424480205&rft_id=info:doi/10.1109/NANOARCH.2010.5510934&rft_dat=%3Cieee_6IE%3E5510934%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1424480191&rft.eisbn_list=9781424480197&rft.eisbn_list=9781424480180&rft.eisbn_list=1424480183&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5510934&rfr_iscdi=true |