Design of a novel dual-band concurrent CMOS LNA with current reuse topology

This paper presents a novel dual-band concurrent fully integrated low noise amplifier (LNA) with current reuse topology for W-LAN IEEE 802.11b/g/a standards. A general methodology for the design of concurrent LNAs is provided that makes it possible to achieve simultaneous narrowband gain and matchin...

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description This paper presents a novel dual-band concurrent fully integrated low noise amplifier (LNA) with current reuse topology for W-LAN IEEE 802.11b/g/a standards. A general methodology for the design of concurrent LNAs is provided that makes it possible to achieve simultaneous narrowband gain and matching at multiple frequencies. Furthermore, the use of a concurrent topology enables saving important die area and power consumption compared to the parallel solution that employs two separated LNAs. A fully integrated dual band LNA was designed using 0.18μm CMOS process. The LNA provides narrow-band gain and matching at 2.4GHz and 5.2GHz bands, simultaneously. At 2.4GHz, the LNA exhibits a noise figure of 2.5dB, a voltage gain of 21 dB and input matching of -12.7dB. However, the LNA at 5.2GHz features a noise figure of 2.4dB, a voltage gain of 12.5dB and a and input matching of -17.4dB. The power consumption is 10mW under a power supply voltage of 1.8V. The designed system demonstrates relatively suitable response in Variation 10% supply voltage.
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subjects Concurrent dual-band operation
current reuse topology
Design methodology
Dual band
Energy consumption
Impedance matching
input/output matching network design
low-noise amplifier
Low-noise amplifiers
Narrowband
Noise figure
Topology
Voltage
Wireless LAN
title Design of a novel dual-band concurrent CMOS LNA with current reuse topology
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