SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design

We reported a secure scan design approach using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker...

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Hauptverfasser: Fujiwara, Katsuya, Fujiwara, Hideo, Obien, Marie, Tamamoto, Hideo
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Fujiwara, Hideo
Obien, Marie
Tamamoto, Hideo
description We reported a secure scan design approach using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker can identify the configuration of the shift register equivalent used in the circuit, and hence the attack probability approximates to the reciprocal of the cardinality of the class of shift register equivalents. In this paper, we clarify the cardinality of each class of shift register equivalents from several linear structured circuits and the cardinality of the whole class of shift register equivalents. We also consider the enumeration problem of shift register equivalents and the synthesis problem of desired shift register equivalents. A program called SREEP (Shift Register Equivalents Enumeration and Synthesis Program) is presented to solve those problems.
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subjects cardinality
Circuit faults
Circuit synthesis
Circuit testing
Design for testability
Digital circuits
enumeration
Feedforward systems
Information security
Linear feedback shift registers
Protection
scan design
security
shift register equivalents
Shift registers
testability
title SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design
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