SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design
We reported a secure scan design approach using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker...
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creator | Fujiwara, Katsuya Fujiwara, Hideo Obien, Marie Tamamoto, Hideo |
description | We reported a secure scan design approach using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker can identify the configuration of the shift register equivalent used in the circuit, and hence the attack probability approximates to the reciprocal of the cardinality of the class of shift register equivalents. In this paper, we clarify the cardinality of each class of shift register equivalents from several linear structured circuits and the cardinality of the whole class of shift register equivalents. We also consider the enumeration problem of shift register equivalents and the synthesis problem of desired shift register equivalents. A program called SREEP (Shift Register Equivalents Enumeration and Synthesis Program) is presented to solve those problems. |
doi_str_mv | 10.1109/DDECS.2010.5491786 |
format | Conference Proceeding |
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The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker can identify the configuration of the shift register equivalent used in the circuit, and hence the attack probability approximates to the reciprocal of the cardinality of the class of shift register equivalents. In this paper, we clarify the cardinality of each class of shift register equivalents from several linear structured circuits and the cardinality of the whole class of shift register equivalents. We also consider the enumeration problem of shift register equivalents and the synthesis problem of desired shift register equivalents. A program called SREEP (Shift Register Equivalents Enumeration and Synthesis Program) is presented to solve those problems.</description><identifier>ISBN: 9781424466122</identifier><identifier>ISBN: 1424466121</identifier><identifier>EISBN: 9781424466115</identifier><identifier>EISBN: 9781424466139</identifier><identifier>EISBN: 142446613X</identifier><identifier>EISBN: 1424466113</identifier><identifier>DOI: 10.1109/DDECS.2010.5491786</identifier><language>eng</language><publisher>IEEE</publisher><subject>cardinality ; Circuit faults ; Circuit synthesis ; Circuit testing ; Design for testability ; Digital circuits ; enumeration ; Feedforward systems ; Information security ; Linear feedback shift registers ; Protection ; scan design ; security ; shift register equivalents ; Shift registers ; testability</subject><ispartof>13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010, p.193-196</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5491786$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5491786$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fujiwara, Katsuya</creatorcontrib><creatorcontrib>Fujiwara, Hideo</creatorcontrib><creatorcontrib>Obien, Marie</creatorcontrib><creatorcontrib>Tamamoto, Hideo</creatorcontrib><title>SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design</title><title>13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems</title><addtitle>DDECS</addtitle><description>We reported a secure scan design approach using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker can identify the configuration of the shift register equivalent used in the circuit, and hence the attack probability approximates to the reciprocal of the cardinality of the class of shift register equivalents. In this paper, we clarify the cardinality of each class of shift register equivalents from several linear structured circuits and the cardinality of the whole class of shift register equivalents. We also consider the enumeration problem of shift register equivalents and the synthesis problem of desired shift register equivalents. A program called SREEP (Shift Register Equivalents Enumeration and Synthesis Program) is presented to solve those problems.</description><subject>cardinality</subject><subject>Circuit faults</subject><subject>Circuit synthesis</subject><subject>Circuit testing</subject><subject>Design for testability</subject><subject>Digital circuits</subject><subject>enumeration</subject><subject>Feedforward systems</subject><subject>Information security</subject><subject>Linear feedback shift registers</subject><subject>Protection</subject><subject>scan design</subject><subject>security</subject><subject>shift register equivalents</subject><subject>Shift registers</subject><subject>testability</subject><isbn>9781424466122</isbn><isbn>1424466121</isbn><isbn>9781424466115</isbn><isbn>9781424466139</isbn><isbn>142446613X</isbn><isbn>1424466113</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVUF9LwzAcjIigzH4BfckX6My_dolv0tU_MHCse_JlJOmvXWRNNcmEfXsL7sV7OY6D4-4QuqNkTilRD8tlXTVzRiZdCEUXsrxAmVpIKpgQZUlpcflPM3aNshg_yQRRMFLKG_TRbOp6_YibvesS3kDvYoKA6--j-9EH8Cni2h8HCDq50WPtW9ycfNpDdBGvw9gHPeBuDDiCPQbA0WqP28nt_S266vQhQnbmGdo-19vqNV-9v7xVT6vcKZJyLqATwIU0BMAwQbXhjFkB0yRurFRWS65aVRqiW9mqqTk1hipqraCt7PgM3f_FOgDYfQU36HDanQ_hv48vVKE</recordid><startdate>201004</startdate><enddate>201004</enddate><creator>Fujiwara, Katsuya</creator><creator>Fujiwara, Hideo</creator><creator>Obien, Marie</creator><creator>Tamamoto, Hideo</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201004</creationdate><title>SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design</title><author>Fujiwara, Katsuya ; Fujiwara, Hideo ; Obien, Marie ; Tamamoto, Hideo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-34ef4e348b0eeb241ab322c4e5493bc89ca839d96b0ad8d90451bb191cc41d8f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>cardinality</topic><topic>Circuit faults</topic><topic>Circuit synthesis</topic><topic>Circuit testing</topic><topic>Design for testability</topic><topic>Digital circuits</topic><topic>enumeration</topic><topic>Feedforward systems</topic><topic>Information security</topic><topic>Linear feedback shift registers</topic><topic>Protection</topic><topic>scan design</topic><topic>security</topic><topic>shift register equivalents</topic><topic>Shift registers</topic><topic>testability</topic><toplevel>online_resources</toplevel><creatorcontrib>Fujiwara, Katsuya</creatorcontrib><creatorcontrib>Fujiwara, Hideo</creatorcontrib><creatorcontrib>Obien, Marie</creatorcontrib><creatorcontrib>Tamamoto, Hideo</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fujiwara, Katsuya</au><au>Fujiwara, Hideo</au><au>Obien, Marie</au><au>Tamamoto, Hideo</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design</atitle><btitle>13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems</btitle><stitle>DDECS</stitle><date>2010-04</date><risdate>2010</risdate><spage>193</spage><epage>196</epage><pages>193-196</pages><isbn>9781424466122</isbn><isbn>1424466121</isbn><eisbn>9781424466115</eisbn><eisbn>9781424466139</eisbn><eisbn>142446613X</eisbn><eisbn>1424466113</eisbn><abstract>We reported a secure scan design approach using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. The security level of the secure scan architecture based on those shift register equivalents is determined by the probability that an attacker can identify the configuration of the shift register equivalent used in the circuit, and hence the attack probability approximates to the reciprocal of the cardinality of the class of shift register equivalents. In this paper, we clarify the cardinality of each class of shift register equivalents from several linear structured circuits and the cardinality of the whole class of shift register equivalents. We also consider the enumeration problem of shift register equivalents and the synthesis problem of desired shift register equivalents. A program called SREEP (Shift Register Equivalents Enumeration and Synthesis Program) is presented to solve those problems.</abstract><pub>IEEE</pub><doi>10.1109/DDECS.2010.5491786</doi><tpages>4</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | cardinality Circuit faults Circuit synthesis Circuit testing Design for testability Digital circuits enumeration Feedforward systems Information security Linear feedback shift registers Protection scan design security shift register equivalents Shift registers testability |
title | SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design |
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