200 mm DUV Lithography : Material and Process Optimization Application to 0.25 μm CMOS Technology

In order to achieve 0.25 μm CMOS devices with industrial transfer capability, a 8" DUV lithography cell has been installed, including a 5500/90 ASM-L DUV stepper and a TEL Mark 8 track. An original physico-chemical screening test, based on DSC, allows us to select optimized DUV positive materia...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Vinet, F., Buffet, N., Le Cornec, Ch, Lerme, M., Morand, Y., Mourier, T., Previtali, B, Paniez, P. J.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS process CMOS technology Delay effects Lithography Optical materials Resists Temperature Thermal resistance Tin Windows
Online-Zugang:	Volltext bestellen
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