A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm
A 40 nm 14-core mobile application processor with a 222 mW Full-HD H.264 video decoder and a video/audio multiprocessor is developed. It has 25 power domains. The power switch circuits realize less than 1 ¿s power-up switching while minimizing rush current. The x512b power-efficient stacked DRAM l/F...
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| creator | Kikuchi, Yu Takahashi, M. Maeda, T. Hara, H. Arakida, H. Yamamoto, H. Hagiwara, Y. Fujita, T. Watanabe, M. Shimazawa, T. Ohara, Y. Miyamori, T. Hamada, M. Oowaki, Y. |
| description | A 40 nm 14-core mobile application processor with a 222 mW Full-HD H.264 video decoder and a video/audio multiprocessor is developed. It has 25 power domains. The power switch circuits realize less than 1 ¿s power-up switching while minimizing rush current. The x512b power-efficient stacked DRAM l/F achieves 10.6 GB/S bandwidth. |
| doi_str_mv | 10.1109/ISSCC.2010.5433906 |
| format | Conference Proceeding |
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It has 25 power domains. The power switch circuits realize less than 1 ¿s power-up switching while minimizing rush current. The x512b power-efficient stacked DRAM l/F achieves 10.6 GB/S bandwidth.</abstract><pub>IEEE</pub><doi>10.1109/ISSCC.2010.5433906</doi><tpages>2</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0193-6530 |
| ispartof | 2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010, p.326-327 |
| issn | 0193-6530 2376-8606 |
| language | eng |
| recordid | cdi_ieee_primary_5433906 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Application software Decoding Energy consumption Engines Hardware Logic Packaging Random access memory Switches Wiring |
| title | A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm |
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