High density and ultra small cell size of Contact ReRAM (CR-RAM) in 90nm CMOS logic technology and circuits

A new contact RRAM cell realized by TiN/TiON layers stacked between the W-plug and n+ diffusion region inside a small 80 × 80 nm contact hole is demonstrated using 90nm CMOS logic technology. This work reports the first time a resistive switching characteristics of the TiON layers sandwiched between...

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Bibliographische Detailangaben

Hauptverfasser:	Yuan Heng Tseng, Chia-En Huang, Kuo, C.-H., Chih, Y.-D., Chrong Jung Lin
Format:	Tagungsbericht
Sprache:	eng ; jpn
Schlagworte:	CMOS logic circuits CMOS process CMOS technology Logic arrays Microelectronics Nonvolatile memory Resistors Tin Transistors Voltage
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