A novel de-embedding technique for On-Wafer characterization of RF CMOS

A novel de-embedding technique based on general fixture model is proposed to accurately de-embed the test fixture parasitic for characterization of RF CMOS at high frequency. The method is able to avoid over-de-embedding errors that exist in conventional techniques by utilizing three Thru structures...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Loo, X.S., Yeo, K.S., Chew, K.W.J., Chan, L.H.K., Ong, S.N., Do, M.A., Boon, C.C.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuit testing CMOS technology De-embedding Fixture parasitic Fixtures Geometry High frequency characterization Industrial electronics Integrated circuit interconnections Radio frequency RF CMOS Scattering parameters Semiconductor device modeling Silicon
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