Operating system support for overlapping-ISA heterogeneous multi-core architectures
A heterogeneous processor consists of cores that are asymmetric in performance and functionality. Such a design provides a cost-effective solution for processor manufacturers to continuously improve both single-thread performance and multi-thread throughput. This design, however, faces significant c...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 12 |
---|---|
container_issue | |
container_start_page | 1 |
container_title | |
container_volume | |
creator | Tong Li Brett, Paul Knauerhase, Rob Koufaty, David Reddy, Dheeraj Hahn, Scott |
description | A heterogeneous processor consists of cores that are asymmetric in performance and functionality. Such a design provides a cost-effective solution for processor manufacturers to continuously improve both single-thread performance and multi-thread throughput. This design, however, faces significant challenges in the operating system, which traditionally assumes only homogeneous hardware. This paper presents a comprehensive study of OS support for heterogeneous architectures in which cores have asymmetric performance and overlapping, but non-identical instruction sets. Our algorithms allow applications to transparently execute and fairly share different types of cores. We have implemented these algorithms in the Linux 2.6.24 kernel and evaluated them on an actual heterogeneous platform. Evaluation results demonstrate that our designs efficiently manage heterogeneous hardware and enable significant performance improvements for a range of applications. |
doi_str_mv | 10.1109/HPCA.2010.5416660 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5416660</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5416660</ieee_id><sourcerecordid>5416660</sourcerecordid><originalsourceid>FETCH-LOGICAL-i1330-547327e00e4a06d66bddebb6cd7bdc5b8f89afe81566688fa8eb4df545e747ab3</originalsourceid><addsrcrecordid>eNpFkNtKw0AYhNcTmFYfQLzZF0j9N3vMZSnWFgoVquBd2U3-tJGkCbsboW9vwIJXw_DBMDOEPDGYMQb5y-p9MZ9lMFopmFIKrsiEiUwIqaRW1yTJuDZpBvzr5h8YcUsSJjmkYHJ9TyYhfANAlkuWkN22R29jfTrQcA4RWxqGvu98pFXnafeDvrF9P-J0vZvTI0b03QFP2A2BtkMT67ToPFLri2MdsYiDx_BA7irbBHy86JR8Ll8_Fqt0s31bL-abtGZ8bCOF5plGABQWVKmUK0t0ThWldmUhnalMbis0TI5LjamsQSfKSgqJWmjr-JQ8_-XWiLjvfd1af95fnuG_hBdV0A</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Operating system support for overlapping-ISA heterogeneous multi-core architectures</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Tong Li ; Brett, Paul ; Knauerhase, Rob ; Koufaty, David ; Reddy, Dheeraj ; Hahn, Scott</creator><creatorcontrib>Tong Li ; Brett, Paul ; Knauerhase, Rob ; Koufaty, David ; Reddy, Dheeraj ; Hahn, Scott</creatorcontrib><description>A heterogeneous processor consists of cores that are asymmetric in performance and functionality. Such a design provides a cost-effective solution for processor manufacturers to continuously improve both single-thread performance and multi-thread throughput. This design, however, faces significant challenges in the operating system, which traditionally assumes only homogeneous hardware. This paper presents a comprehensive study of OS support for heterogeneous architectures in which cores have asymmetric performance and overlapping, but non-identical instruction sets. Our algorithms allow applications to transparently execute and fairly share different types of cores. We have implemented these algorithms in the Linux 2.6.24 kernel and evaluated them on an actual heterogeneous platform. Evaluation results demonstrate that our designs efficiently manage heterogeneous hardware and enable significant performance improvements for a range of applications.</description><identifier>ISSN: 1530-0897</identifier><identifier>ISBN: 1424456584</identifier><identifier>ISBN: 9781424456581</identifier><identifier>EISSN: 2378-203X</identifier><identifier>EISBN: 1424456576</identifier><identifier>EISBN: 1424456592</identifier><identifier>EISBN: 9781424456598</identifier><identifier>EISBN: 9781424456574</identifier><identifier>DOI: 10.1109/HPCA.2010.5416660</identifier><language>eng</language><publisher>IEEE</publisher><subject>Costs ; Frequency ; Hardware ; Instruction sets ; Linux ; Manufacturing processes ; Operating systems ; Parallel processing ; Round robin ; Scheduling</subject><ispartof>HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture, 2010, p.1-12</ispartof><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5416660$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5416660$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Tong Li</creatorcontrib><creatorcontrib>Brett, Paul</creatorcontrib><creatorcontrib>Knauerhase, Rob</creatorcontrib><creatorcontrib>Koufaty, David</creatorcontrib><creatorcontrib>Reddy, Dheeraj</creatorcontrib><creatorcontrib>Hahn, Scott</creatorcontrib><title>Operating system support for overlapping-ISA heterogeneous multi-core architectures</title><title>HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture</title><addtitle>HPCA</addtitle><description>A heterogeneous processor consists of cores that are asymmetric in performance and functionality. Such a design provides a cost-effective solution for processor manufacturers to continuously improve both single-thread performance and multi-thread throughput. This design, however, faces significant challenges in the operating system, which traditionally assumes only homogeneous hardware. This paper presents a comprehensive study of OS support for heterogeneous architectures in which cores have asymmetric performance and overlapping, but non-identical instruction sets. Our algorithms allow applications to transparently execute and fairly share different types of cores. We have implemented these algorithms in the Linux 2.6.24 kernel and evaluated them on an actual heterogeneous platform. Evaluation results demonstrate that our designs efficiently manage heterogeneous hardware and enable significant performance improvements for a range of applications.</description><subject>Costs</subject><subject>Frequency</subject><subject>Hardware</subject><subject>Instruction sets</subject><subject>Linux</subject><subject>Manufacturing processes</subject><subject>Operating systems</subject><subject>Parallel processing</subject><subject>Round robin</subject><subject>Scheduling</subject><issn>1530-0897</issn><issn>2378-203X</issn><isbn>1424456584</isbn><isbn>9781424456581</isbn><isbn>1424456576</isbn><isbn>1424456592</isbn><isbn>9781424456598</isbn><isbn>9781424456574</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkNtKw0AYhNcTmFYfQLzZF0j9N3vMZSnWFgoVquBd2U3-tJGkCbsboW9vwIJXw_DBMDOEPDGYMQb5y-p9MZ9lMFopmFIKrsiEiUwIqaRW1yTJuDZpBvzr5h8YcUsSJjmkYHJ9TyYhfANAlkuWkN22R29jfTrQcA4RWxqGvu98pFXnafeDvrF9P-J0vZvTI0b03QFP2A2BtkMT67ToPFLri2MdsYiDx_BA7irbBHy86JR8Ll8_Fqt0s31bL-abtGZ8bCOF5plGABQWVKmUK0t0ThWldmUhnalMbis0TI5LjamsQSfKSgqJWmjr-JQ8_-XWiLjvfd1af95fnuG_hBdV0A</recordid><startdate>201001</startdate><enddate>201001</enddate><creator>Tong Li</creator><creator>Brett, Paul</creator><creator>Knauerhase, Rob</creator><creator>Koufaty, David</creator><creator>Reddy, Dheeraj</creator><creator>Hahn, Scott</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201001</creationdate><title>Operating system support for overlapping-ISA heterogeneous multi-core architectures</title><author>Tong Li ; Brett, Paul ; Knauerhase, Rob ; Koufaty, David ; Reddy, Dheeraj ; Hahn, Scott</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i1330-547327e00e4a06d66bddebb6cd7bdc5b8f89afe81566688fa8eb4df545e747ab3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Costs</topic><topic>Frequency</topic><topic>Hardware</topic><topic>Instruction sets</topic><topic>Linux</topic><topic>Manufacturing processes</topic><topic>Operating systems</topic><topic>Parallel processing</topic><topic>Round robin</topic><topic>Scheduling</topic><toplevel>online_resources</toplevel><creatorcontrib>Tong Li</creatorcontrib><creatorcontrib>Brett, Paul</creatorcontrib><creatorcontrib>Knauerhase, Rob</creatorcontrib><creatorcontrib>Koufaty, David</creatorcontrib><creatorcontrib>Reddy, Dheeraj</creatorcontrib><creatorcontrib>Hahn, Scott</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tong Li</au><au>Brett, Paul</au><au>Knauerhase, Rob</au><au>Koufaty, David</au><au>Reddy, Dheeraj</au><au>Hahn, Scott</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Operating system support for overlapping-ISA heterogeneous multi-core architectures</atitle><btitle>HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture</btitle><stitle>HPCA</stitle><date>2010-01</date><risdate>2010</risdate><spage>1</spage><epage>12</epage><pages>1-12</pages><issn>1530-0897</issn><eissn>2378-203X</eissn><isbn>1424456584</isbn><isbn>9781424456581</isbn><eisbn>1424456576</eisbn><eisbn>1424456592</eisbn><eisbn>9781424456598</eisbn><eisbn>9781424456574</eisbn><abstract>A heterogeneous processor consists of cores that are asymmetric in performance and functionality. Such a design provides a cost-effective solution for processor manufacturers to continuously improve both single-thread performance and multi-thread throughput. This design, however, faces significant challenges in the operating system, which traditionally assumes only homogeneous hardware. This paper presents a comprehensive study of OS support for heterogeneous architectures in which cores have asymmetric performance and overlapping, but non-identical instruction sets. Our algorithms allow applications to transparently execute and fairly share different types of cores. We have implemented these algorithms in the Linux 2.6.24 kernel and evaluated them on an actual heterogeneous platform. Evaluation results demonstrate that our designs efficiently manage heterogeneous hardware and enable significant performance improvements for a range of applications.</abstract><pub>IEEE</pub><doi>10.1109/HPCA.2010.5416660</doi><tpages>12</tpages><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 1530-0897 |
ispartof | HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture, 2010, p.1-12 |
issn | 1530-0897 2378-203X |
language | eng |
recordid | cdi_ieee_primary_5416660 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Costs Frequency Hardware Instruction sets Linux Manufacturing processes Operating systems Parallel processing Round robin Scheduling |
title | Operating system support for overlapping-ISA heterogeneous multi-core architectures |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T00%3A22%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Operating%20system%20support%20for%20overlapping-ISA%20heterogeneous%20multi-core%20architectures&rft.btitle=HPCA%20-%2016%202010%20The%20Sixteenth%20International%20Symposium%20on%20High-Performance%20Computer%20Architecture&rft.au=Tong%20Li&rft.date=2010-01&rft.spage=1&rft.epage=12&rft.pages=1-12&rft.issn=1530-0897&rft.eissn=2378-203X&rft.isbn=1424456584&rft.isbn_list=9781424456581&rft_id=info:doi/10.1109/HPCA.2010.5416660&rft_dat=%3Cieee_6IE%3E5416660%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1424456576&rft.eisbn_list=1424456592&rft.eisbn_list=9781424456598&rft.eisbn_list=9781424456574&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5416660&rfr_iscdi=true |