Static slicing-based pre-reduction technique for MDG model-checker

The hardware designs that are described at the register transfer level (RTL) have become more complex and difficult to debug. Therefore, using Multiway Decision Graphs (MDG), the same designs can be defined into a more abstract environment. However, to avoid the state explosion problem, the MDG-base...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Elmansori, Saad, Mohamed, Otmane Ait, Awwad, F
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Binary decision diagrams Boolean functions Circuit simulation Data structures Explosions Formal verification Hardware Reduced order systems Registers State-space methods
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