All-screen-printed 120-µM-thin large-area silicon solar cells applying dielectric rear passivation and laser-fired contacts reaching 18% efficiency
The market need for a lower price per Watt peak asks for the development of solar cell designs with a low production cost and a high performance. An approach to reach a high efficiency with a solar cell structure containing a diffused emitter on a p-type silicon wafer is the implementation of a PERC...
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creator | Gautero, L. Hofmann, M. Rentsch, J. Lemke, A. Mack, S. Seiffe, J. Nekarda, J. Biro, D. Wolf, A. Bitnar, B. Sallese, J.-M. Preu, R. |
description | The market need for a lower price per Watt peak asks for the development of solar cell designs with a low production cost and a high performance. An approach to reach a high efficiency with a solar cell structure containing a diffused emitter on a p-type silicon wafer is the implementation of a PERC structure on the rear side. This structure gets advantageous to the standard screen printed solar cell when its production cost stays comparable to the latter and offers a higher efficiency. Since this technique can inherently be applied to thinner wafers, an additional advantage comes from the reduced material consumption. The purpose of this work is to introduce a production sequence able to create a PERC structure on thin silicon wafers using steps available in the PV industry or at least close to industrial application. Applying this process on Czochralski (Cz) wafers of 120 μm thickness, a stable efficiency of 18.0 % was achieved. |
doi_str_mv | 10.1109/PVSC.2009.5411562 |
format | Conference Proceeding |
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An approach to reach a high efficiency with a solar cell structure containing a diffused emitter on a p-type silicon wafer is the implementation of a PERC structure on the rear side. This structure gets advantageous to the standard screen printed solar cell when its production cost stays comparable to the latter and offers a higher efficiency. Since this technique can inherently be applied to thinner wafers, an additional advantage comes from the reduced material consumption. The purpose of this work is to introduce a production sequence able to create a PERC structure on thin silicon wafers using steps available in the PV industry or at least close to industrial application. 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An approach to reach a high efficiency with a solar cell structure containing a diffused emitter on a p-type silicon wafer is the implementation of a PERC structure on the rear side. This structure gets advantageous to the standard screen printed solar cell when its production cost stays comparable to the latter and offers a higher efficiency. Since this technique can inherently be applied to thinner wafers, an additional advantage comes from the reduced material consumption. The purpose of this work is to introduce a production sequence able to create a PERC structure on thin silicon wafers using steps available in the PV industry or at least close to industrial application. Applying this process on Czochralski (Cz) wafers of 120 μm thickness, a stable efficiency of 18.0 % was achieved.</description><subject>Costs</subject><subject>Dielectrics</subject><subject>Passivation</subject><subject>Photovoltaic cells</subject><subject>Production</subject><subject>Silicon</subject><subject>Silver</subject><subject>Surface cleaning</subject><subject>Surface texture</subject><subject>Wet etching</subject><issn>0160-8371</issn><isbn>1424429498</isbn><isbn>9781424429493</isbn><isbn>9781424429509</isbn><isbn>1424429501</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotkE1KBDEQhSMqOOocQNxk4zJjVZLuTpYy-AeKgoPbIZNUNBLbIWmEuYdX8QKezBZnVVTx3vd4xdgJwgwR7Pnj89N8JgHsrNGITSt32NR2BrXUWtoG7C473C7amj02AWxBGNXhPpsYLVoNaOQBm9b6BgBo204CTtjXRc6i-kLUi3VJ_UCBowTx830vhtfU8-zKCwlXyPGacvIfPa8f45F7yrlyt17nTepfeEiUyQ8leT5qC1-7WtOnG9JocH0YOZWKiKmMASNkcH6of0r_-udGc8YpxuQT9X5zzPajy5Wm23nEFleXi_mNuHu4vp1f3InUKilUa1aNAZIrjF2AuNLSUKdcS2DRY2tVbIKT5I0LGIPCABhk0I1Z6YiqUUfs9B-biGg5tn93ZbPc_lf9Ar8VbMY</recordid><startdate>200906</startdate><enddate>200906</enddate><creator>Gautero, L.</creator><creator>Hofmann, M.</creator><creator>Rentsch, J.</creator><creator>Lemke, A.</creator><creator>Mack, S.</creator><creator>Seiffe, J.</creator><creator>Nekarda, J.</creator><creator>Biro, D.</creator><creator>Wolf, A.</creator><creator>Bitnar, B.</creator><creator>Sallese, J.-M.</creator><creator>Preu, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200906</creationdate><title>All-screen-printed 120-µM-thin large-area silicon solar cells applying dielectric rear passivation and laser-fired contacts reaching 18% efficiency</title><author>Gautero, L. ; Hofmann, M. ; Rentsch, J. ; Lemke, A. ; Mack, S. ; Seiffe, J. ; Nekarda, J. ; Biro, D. ; Wolf, A. ; Bitnar, B. ; Sallese, J.-M. ; Preu, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i632-368b580e2b1f7d0fb428e73a6e091c1693f5da2ec8ad1fd31d01d2d458b4f1353</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Costs</topic><topic>Dielectrics</topic><topic>Passivation</topic><topic>Photovoltaic cells</topic><topic>Production</topic><topic>Silicon</topic><topic>Silver</topic><topic>Surface cleaning</topic><topic>Surface texture</topic><topic>Wet etching</topic><toplevel>online_resources</toplevel><creatorcontrib>Gautero, L.</creatorcontrib><creatorcontrib>Hofmann, M.</creatorcontrib><creatorcontrib>Rentsch, J.</creatorcontrib><creatorcontrib>Lemke, A.</creatorcontrib><creatorcontrib>Mack, S.</creatorcontrib><creatorcontrib>Seiffe, J.</creatorcontrib><creatorcontrib>Nekarda, J.</creatorcontrib><creatorcontrib>Biro, D.</creatorcontrib><creatorcontrib>Wolf, A.</creatorcontrib><creatorcontrib>Bitnar, B.</creatorcontrib><creatorcontrib>Sallese, J.-M.</creatorcontrib><creatorcontrib>Preu, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gautero, L.</au><au>Hofmann, M.</au><au>Rentsch, J.</au><au>Lemke, A.</au><au>Mack, S.</au><au>Seiffe, J.</au><au>Nekarda, J.</au><au>Biro, D.</au><au>Wolf, A.</au><au>Bitnar, B.</au><au>Sallese, J.-M.</au><au>Preu, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>All-screen-printed 120-µM-thin large-area silicon solar cells applying dielectric rear passivation and laser-fired contacts reaching 18% efficiency</atitle><btitle>2009 34th IEEE Photovoltaic Specialists Conference (PVSC)</btitle><stitle>PVSC</stitle><date>2009-06</date><risdate>2009</risdate><spage>001888</spage><epage>001893</epage><pages>001888-001893</pages><issn>0160-8371</issn><isbn>1424429498</isbn><isbn>9781424429493</isbn><eisbn>9781424429509</eisbn><eisbn>1424429501</eisbn><abstract>The market need for a lower price per Watt peak asks for the development of solar cell designs with a low production cost and a high performance. An approach to reach a high efficiency with a solar cell structure containing a diffused emitter on a p-type silicon wafer is the implementation of a PERC structure on the rear side. This structure gets advantageous to the standard screen printed solar cell when its production cost stays comparable to the latter and offers a higher efficiency. Since this technique can inherently be applied to thinner wafers, an additional advantage comes from the reduced material consumption. The purpose of this work is to introduce a production sequence able to create a PERC structure on thin silicon wafers using steps available in the PV industry or at least close to industrial application. Applying this process on Czochralski (Cz) wafers of 120 μm thickness, a stable efficiency of 18.0 % was achieved.</abstract><pub>IEEE</pub><doi>10.1109/PVSC.2009.5411562</doi><tpages>6</tpages><oa>free_for_read</oa></addata></record> |
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identifier | ISSN: 0160-8371 |
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issn | 0160-8371 |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Costs Dielectrics Passivation Photovoltaic cells Production Silicon Silver Surface cleaning Surface texture Wet etching |
title | All-screen-printed 120-µM-thin large-area silicon solar cells applying dielectric rear passivation and laser-fired contacts reaching 18% efficiency |
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