Via-programmable logic array VPEX2 with configurable DFF using 2 logic elements

We have been studied the VPEX (via programmable logic using exclusive or array) architecture whose logic element (LE) consist of the combination of AOI21, NOR and NOT gates. We adopted ¿configurable DFF architecture¿ which means that a DFF can be configured using few LEs on demand. In the former VPE...

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Bibliographische Detailangaben

Hauptverfasser:	Fujino, T., Nishimoto, T., Kokusyo, Y., Yoshikawa, M., Lemieux, G.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuits Costs Delay effects Field programmable gate arrays Lithography Logic arrays Logic design Logic devices Logic functions Programmable logic arrays Structured ASIC Via programmable logic device
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