Reliability analysis of copper interconnections of system-in-packaging

The system-in-package (SiP) is among the popular package structures which meet the trend of integrated circuit (IC) product development. The SiP structure investigated in this study includes seven sub-chips attached to the chip carrier, with polymer applied around the chips. The polymer is used as a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Shin-Yueh Yang, Shih-Ying Chiang, Chan-Yen Chou, Ming-Chih Yew, Kuo-Ning Chiang
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Capacitive sensors Chip scale packaging Copper Integrated circuit interconnections Integrated circuit reliability Polymers Thermal expansion Thermal loading Thermal stresses Wafer scale integration
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!