Dynamic context management for coarse-grained reconfigurable array DSP architecture

This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting...

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Hauptverfasser: Yanliang Liu, Peng Dai, Xin'an Wang, Xing Zhang, Lai Wei, Yan Zhou, Yachun Sun
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creator Yanliang Liu
Peng Dai
Xin'an Wang
Xing Zhang
Lai Wei
Yan Zhou
Yachun Sun
description This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can be switched dramatically reducing reconfiguration overhead if the next configuration is present in one of the alternate contexts. The proposed technique has been verified in ReMAP (Reconfigurable Multi-media Array Processors) with the Discrete Cosine Transform (DCT) of H.264 and its performance exceed other DSP and multimedia extension architectures by 1.2x to 6.2x. ReMAP was fabricated with SMIC's 0.18¿m CMOS process mainly for multimedia applications.
doi_str_mv 10.1109/ASICON.2009.5351603
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fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5351603</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5351603</ieee_id><sourcerecordid>5351603</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-b687387e66173e75b3006f1451433bbb37e64d793db9b76a0013a5a0038f31ff3</originalsourceid><addsrcrecordid>eNo9kNtqAjEQhtODULU-gTf7AmszOzlsLkV7EKQWbKF3kqwTm-KuJbtCffumVDo3_zDf8MEMY2PgEwBu7qbrxWz1PCk4NxOJEhTHCzYAUQiBpebykvULUEWupXy_YiOjyzNTBq__mYAeG_w6DOfJccNGbfvJUwmJoE2freenxtahyqpD09F3l9W2sTuqqekyf4hpbGNL-S7a0NA2i5T2fNgdo3V7ymyM9pTN1y-pqz5CR1V3jHTLet7uWxqdc8jeHu5fZ0_5cvW4mE2XeQAtu9ypUqdTSCnQSFo65Fx5EBIEonMOExJbbXDrjNPKcg5oZQosPYL3OGTjP28gos1XDLWNp835WfgDnMxXVw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Dynamic context management for coarse-grained reconfigurable array DSP architecture</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Yanliang Liu ; Peng Dai ; Xin'an Wang ; Xing Zhang ; Lai Wei ; Yan Zhou ; Yachun Sun</creator><creatorcontrib>Yanliang Liu ; Peng Dai ; Xin'an Wang ; Xing Zhang ; Lai Wei ; Yan Zhou ; Yachun Sun</creatorcontrib><description>This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can be switched dramatically reducing reconfiguration overhead if the next configuration is present in one of the alternate contexts. The proposed technique has been verified in ReMAP (Reconfigurable Multi-media Array Processors) with the Discrete Cosine Transform (DCT) of H.264 and its performance exceed other DSP and multimedia extension architectures by 1.2x to 6.2x. ReMAP was fabricated with SMIC's 0.18¿m CMOS process mainly for multimedia applications.</description><identifier>ISSN: 2162-7541</identifier><identifier>ISBN: 9781424438693</identifier><identifier>ISBN: 1424438691</identifier><identifier>ISBN: 1424438683</identifier><identifier>ISBN: 9781424438686</identifier><identifier>EISSN: 2162-755X</identifier><identifier>EISBN: 1424438705</identifier><identifier>EISBN: 9781424438709</identifier><identifier>DOI: 10.1109/ASICON.2009.5351603</identifier><identifier>LCCN: 2009900516</identifier><language>eng</language><publisher>IEEE</publisher><subject>Coarse-grained Reconfigurable Array DSP Architecture ; Computer applications ; Computer architecture ; Context reuse ; Context switch ; Digital signal processing ; Discrete cosine transforms ; Energy consumption ; Energy management ; Hardware ; Partially Reconfiguration ; Runtime ; Runtime reconfiguration (RTR) ; Sun ; Switches</subject><ispartof>2009 IEEE 8th International Conference on ASIC, 2009, p.79-82</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5351603$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,778,782,787,788,2054,27908,54903</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5351603$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yanliang Liu</creatorcontrib><creatorcontrib>Peng Dai</creatorcontrib><creatorcontrib>Xin'an Wang</creatorcontrib><creatorcontrib>Xing Zhang</creatorcontrib><creatorcontrib>Lai Wei</creatorcontrib><creatorcontrib>Yan Zhou</creatorcontrib><creatorcontrib>Yachun Sun</creatorcontrib><title>Dynamic context management for coarse-grained reconfigurable array DSP architecture</title><title>2009 IEEE 8th International Conference on ASIC</title><addtitle>ASICON</addtitle><description>This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can be switched dramatically reducing reconfiguration overhead if the next configuration is present in one of the alternate contexts. The proposed technique has been verified in ReMAP (Reconfigurable Multi-media Array Processors) with the Discrete Cosine Transform (DCT) of H.264 and its performance exceed other DSP and multimedia extension architectures by 1.2x to 6.2x. ReMAP was fabricated with SMIC's 0.18¿m CMOS process mainly for multimedia applications.</description><subject>Coarse-grained Reconfigurable Array DSP Architecture</subject><subject>Computer applications</subject><subject>Computer architecture</subject><subject>Context reuse</subject><subject>Context switch</subject><subject>Digital signal processing</subject><subject>Discrete cosine transforms</subject><subject>Energy consumption</subject><subject>Energy management</subject><subject>Hardware</subject><subject>Partially Reconfiguration</subject><subject>Runtime</subject><subject>Runtime reconfiguration (RTR)</subject><subject>Sun</subject><subject>Switches</subject><issn>2162-7541</issn><issn>2162-755X</issn><isbn>9781424438693</isbn><isbn>1424438691</isbn><isbn>1424438683</isbn><isbn>9781424438686</isbn><isbn>1424438705</isbn><isbn>9781424438709</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo9kNtqAjEQhtODULU-gTf7AmszOzlsLkV7EKQWbKF3kqwTm-KuJbtCffumVDo3_zDf8MEMY2PgEwBu7qbrxWz1PCk4NxOJEhTHCzYAUQiBpebykvULUEWupXy_YiOjyzNTBq__mYAeG_w6DOfJccNGbfvJUwmJoE2freenxtahyqpD09F3l9W2sTuqqekyf4hpbGNL-S7a0NA2i5T2fNgdo3V7ymyM9pTN1y-pqz5CR1V3jHTLet7uWxqdc8jeHu5fZ0_5cvW4mE2XeQAtu9ypUqdTSCnQSFo65Fx5EBIEonMOExJbbXDrjNPKcg5oZQosPYL3OGTjP28gos1XDLWNp835WfgDnMxXVw</recordid><startdate>200910</startdate><enddate>200910</enddate><creator>Yanliang Liu</creator><creator>Peng Dai</creator><creator>Xin'an Wang</creator><creator>Xing Zhang</creator><creator>Lai Wei</creator><creator>Yan Zhou</creator><creator>Yachun Sun</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200910</creationdate><title>Dynamic context management for coarse-grained reconfigurable array DSP architecture</title><author>Yanliang Liu ; Peng Dai ; Xin'an Wang ; Xing Zhang ; Lai Wei ; Yan Zhou ; Yachun Sun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-b687387e66173e75b3006f1451433bbb37e64d793db9b76a0013a5a0038f31ff3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Coarse-grained Reconfigurable Array DSP Architecture</topic><topic>Computer applications</topic><topic>Computer architecture</topic><topic>Context reuse</topic><topic>Context switch</topic><topic>Digital signal processing</topic><topic>Discrete cosine transforms</topic><topic>Energy consumption</topic><topic>Energy management</topic><topic>Hardware</topic><topic>Partially Reconfiguration</topic><topic>Runtime</topic><topic>Runtime reconfiguration (RTR)</topic><topic>Sun</topic><topic>Switches</topic><toplevel>online_resources</toplevel><creatorcontrib>Yanliang Liu</creatorcontrib><creatorcontrib>Peng Dai</creatorcontrib><creatorcontrib>Xin'an Wang</creatorcontrib><creatorcontrib>Xing Zhang</creatorcontrib><creatorcontrib>Lai Wei</creatorcontrib><creatorcontrib>Yan Zhou</creatorcontrib><creatorcontrib>Yachun Sun</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yanliang Liu</au><au>Peng Dai</au><au>Xin'an Wang</au><au>Xing Zhang</au><au>Lai Wei</au><au>Yan Zhou</au><au>Yachun Sun</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Dynamic context management for coarse-grained reconfigurable array DSP architecture</atitle><btitle>2009 IEEE 8th International Conference on ASIC</btitle><stitle>ASICON</stitle><date>2009-10</date><risdate>2009</risdate><spage>79</spage><epage>82</epage><pages>79-82</pages><issn>2162-7541</issn><eissn>2162-755X</eissn><isbn>9781424438693</isbn><isbn>1424438691</isbn><isbn>1424438683</isbn><isbn>9781424438686</isbn><eisbn>1424438705</eisbn><eisbn>9781424438709</eisbn><abstract>This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can be switched dramatically reducing reconfiguration overhead if the next configuration is present in one of the alternate contexts. The proposed technique has been verified in ReMAP (Reconfigurable Multi-media Array Processors) with the Discrete Cosine Transform (DCT) of H.264 and its performance exceed other DSP and multimedia extension architectures by 1.2x to 6.2x. ReMAP was fabricated with SMIC's 0.18¿m CMOS process mainly for multimedia applications.</abstract><pub>IEEE</pub><doi>10.1109/ASICON.2009.5351603</doi><tpages>4</tpages></addata></record>
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subjects Coarse-grained Reconfigurable Array DSP Architecture
Computer applications
Computer architecture
Context reuse
Context switch
Digital signal processing
Discrete cosine transforms
Energy consumption
Energy management
Hardware
Partially Reconfiguration
Runtime
Runtime reconfiguration (RTR)
Sun
Switches
title Dynamic context management for coarse-grained reconfigurable array DSP architecture
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T07%3A58%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Dynamic%20context%20management%20for%20coarse-grained%20reconfigurable%20array%20DSP%20architecture&rft.btitle=2009%20IEEE%208th%20International%20Conference%20on%20ASIC&rft.au=Yanliang%20Liu&rft.date=2009-10&rft.spage=79&rft.epage=82&rft.pages=79-82&rft.issn=2162-7541&rft.eissn=2162-755X&rft.isbn=9781424438693&rft.isbn_list=1424438691&rft.isbn_list=1424438683&rft.isbn_list=9781424438686&rft_id=info:doi/10.1109/ASICON.2009.5351603&rft_dat=%3Cieee_6IE%3E5351603%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1424438705&rft.eisbn_list=9781424438709&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5351603&rfr_iscdi=true