Design and implementation of a configurable hardware profiler supporting path profiling and sampling
Profiling plays an important role in performance optimization, such as instruction set optimization, dynamic binary translation and so on. Unfortunately, profilers nowadays often lack in efficiency on two key attributes: accuracy and profiling time. In this paper, we introduce a configurable hardwar...
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creator | Huizhen Zhang Jinsong Ji Xuehai Zhou Hongxing Ma Chao Wang |
description | Profiling plays an important role in performance optimization, such as instruction set optimization, dynamic binary translation and so on. Unfortunately, profilers nowadays often lack in efficiency on two key attributes: accuracy and profiling time. In this paper, we introduce a configurable hardware path profiler deriving from previous work, based on the idea of sampling and path profiling. The profiler consists of three modules respectively for identifying branches, detecting paths and storing information. It can work with different processors loosely. It utilizes dynamic path profiling technique on instruction level to accurately obtain sensitive hot information of executing programs while supports multiple sampling policies to reduce profiling overheads. Through configuration, the profiler can perform different profiling policies and profile target programs continuously or discretely. Empirical experiments show that the profiler can reduce hardware timing to 6.4% and keep the accuracy up to 90%. |
doi_str_mv | 10.1109/CYBERC.2009.5342169 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5342169</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5342169</ieee_id><sourcerecordid>5342169</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-4c46aa80bf6fa18185404c4188a1adcec0a8cde4dd4d15ed96a9f5fb96ab53283</originalsourceid><addsrcrecordid>eNo1kMtOwzAQRY1QJWjJF3TjH0iwHSexlxDKQ6qEhLphVU3icWqUOJGTCvH3JKLM5urMHZ3FELLlLOGc6fvy83H3USaCMZ1kqRQ811dkzaWQMhNcq2sS6UL9sypWZL3c6lRqIW5INI5fbJ65LLS8JeYJR9d4Ct5Q1w0tdugnmFzvaW8p0Lr31jXnAFWL9ATBfENAOoTeuhYDHc_D0IfJ-YYOMJ0uxYKLcITZOMMdWVloR4wuuSGH592hfI337y9v5cM-dppNsaxlDqBYZXMLXHGVSTbvuFLAwdRYM1C1QWmMNDxDo3PQNrPVnFWWCpVuyPZP6xDxOATXQfg5Xp6U_gLdBFv8</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Design and implementation of a configurable hardware profiler supporting path profiling and sampling</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Huizhen Zhang ; Jinsong Ji ; Xuehai Zhou ; Hongxing Ma ; Chao Wang</creator><creatorcontrib>Huizhen Zhang ; Jinsong Ji ; Xuehai Zhou ; Hongxing Ma ; Chao Wang</creatorcontrib><description>Profiling plays an important role in performance optimization, such as instruction set optimization, dynamic binary translation and so on. Unfortunately, profilers nowadays often lack in efficiency on two key attributes: accuracy and profiling time. In this paper, we introduce a configurable hardware path profiler deriving from previous work, based on the idea of sampling and path profiling. The profiler consists of three modules respectively for identifying branches, detecting paths and storing information. It can work with different processors loosely. It utilizes dynamic path profiling technique on instruction level to accurately obtain sensitive hot information of executing programs while supports multiple sampling policies to reduce profiling overheads. Through configuration, the profiler can perform different profiling policies and profile target programs continuously or discretely. Empirical experiments show that the profiler can reduce hardware timing to 6.4% and keep the accuracy up to 90%.</description><identifier>ISBN: 9781424452187</identifier><identifier>ISBN: 142445218X</identifier><identifier>EISBN: 1424452198</identifier><identifier>EISBN: 9781424452194</identifier><identifier>DOI: 10.1109/CYBERC.2009.5342169</identifier><identifier>LCCN: 2009934922</identifier><language>eng</language><publisher>IEEE</publisher><subject>Assembly ; Chaos ; Computer science ; Counting circuits ; Frequency ; Hardware ; instruction extension ; Instruments ; Optimization ; path profiling ; performance optimization ; Runtime ; sampling ; Sampling methods</subject><ispartof>2009 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2009, p.325-330</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5342169$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,778,782,787,788,2054,27908,54903</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5342169$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Huizhen Zhang</creatorcontrib><creatorcontrib>Jinsong Ji</creatorcontrib><creatorcontrib>Xuehai Zhou</creatorcontrib><creatorcontrib>Hongxing Ma</creatorcontrib><creatorcontrib>Chao Wang</creatorcontrib><title>Design and implementation of a configurable hardware profiler supporting path profiling and sampling</title><title>2009 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery</title><addtitle>CYBERC</addtitle><description>Profiling plays an important role in performance optimization, such as instruction set optimization, dynamic binary translation and so on. Unfortunately, profilers nowadays often lack in efficiency on two key attributes: accuracy and profiling time. In this paper, we introduce a configurable hardware path profiler deriving from previous work, based on the idea of sampling and path profiling. The profiler consists of three modules respectively for identifying branches, detecting paths and storing information. It can work with different processors loosely. It utilizes dynamic path profiling technique on instruction level to accurately obtain sensitive hot information of executing programs while supports multiple sampling policies to reduce profiling overheads. Through configuration, the profiler can perform different profiling policies and profile target programs continuously or discretely. Empirical experiments show that the profiler can reduce hardware timing to 6.4% and keep the accuracy up to 90%.</description><subject>Assembly</subject><subject>Chaos</subject><subject>Computer science</subject><subject>Counting circuits</subject><subject>Frequency</subject><subject>Hardware</subject><subject>instruction extension</subject><subject>Instruments</subject><subject>Optimization</subject><subject>path profiling</subject><subject>performance optimization</subject><subject>Runtime</subject><subject>sampling</subject><subject>Sampling methods</subject><isbn>9781424452187</isbn><isbn>142445218X</isbn><isbn>1424452198</isbn><isbn>9781424452194</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1kMtOwzAQRY1QJWjJF3TjH0iwHSexlxDKQ6qEhLphVU3icWqUOJGTCvH3JKLM5urMHZ3FELLlLOGc6fvy83H3USaCMZ1kqRQ811dkzaWQMhNcq2sS6UL9sypWZL3c6lRqIW5INI5fbJ65LLS8JeYJR9d4Ct5Q1w0tdugnmFzvaW8p0Lr31jXnAFWL9ATBfENAOoTeuhYDHc_D0IfJ-YYOMJ0uxYKLcITZOMMdWVloR4wuuSGH592hfI337y9v5cM-dppNsaxlDqBYZXMLXHGVSTbvuFLAwdRYM1C1QWmMNDxDo3PQNrPVnFWWCpVuyPZP6xDxOATXQfg5Xp6U_gLdBFv8</recordid><startdate>200910</startdate><enddate>200910</enddate><creator>Huizhen Zhang</creator><creator>Jinsong Ji</creator><creator>Xuehai Zhou</creator><creator>Hongxing Ma</creator><creator>Chao Wang</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200910</creationdate><title>Design and implementation of a configurable hardware profiler supporting path profiling and sampling</title><author>Huizhen Zhang ; Jinsong Ji ; Xuehai Zhou ; Hongxing Ma ; Chao Wang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-4c46aa80bf6fa18185404c4188a1adcec0a8cde4dd4d15ed96a9f5fb96ab53283</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Assembly</topic><topic>Chaos</topic><topic>Computer science</topic><topic>Counting circuits</topic><topic>Frequency</topic><topic>Hardware</topic><topic>instruction extension</topic><topic>Instruments</topic><topic>Optimization</topic><topic>path profiling</topic><topic>performance optimization</topic><topic>Runtime</topic><topic>sampling</topic><topic>Sampling methods</topic><toplevel>online_resources</toplevel><creatorcontrib>Huizhen Zhang</creatorcontrib><creatorcontrib>Jinsong Ji</creatorcontrib><creatorcontrib>Xuehai Zhou</creatorcontrib><creatorcontrib>Hongxing Ma</creatorcontrib><creatorcontrib>Chao Wang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Huizhen Zhang</au><au>Jinsong Ji</au><au>Xuehai Zhou</au><au>Hongxing Ma</au><au>Chao Wang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Design and implementation of a configurable hardware profiler supporting path profiling and sampling</atitle><btitle>2009 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery</btitle><stitle>CYBERC</stitle><date>2009-10</date><risdate>2009</risdate><spage>325</spage><epage>330</epage><pages>325-330</pages><isbn>9781424452187</isbn><isbn>142445218X</isbn><eisbn>1424452198</eisbn><eisbn>9781424452194</eisbn><abstract>Profiling plays an important role in performance optimization, such as instruction set optimization, dynamic binary translation and so on. Unfortunately, profilers nowadays often lack in efficiency on two key attributes: accuracy and profiling time. In this paper, we introduce a configurable hardware path profiler deriving from previous work, based on the idea of sampling and path profiling. The profiler consists of three modules respectively for identifying branches, detecting paths and storing information. It can work with different processors loosely. It utilizes dynamic path profiling technique on instruction level to accurately obtain sensitive hot information of executing programs while supports multiple sampling policies to reduce profiling overheads. Through configuration, the profiler can perform different profiling policies and profile target programs continuously or discretely. Empirical experiments show that the profiler can reduce hardware timing to 6.4% and keep the accuracy up to 90%.</abstract><pub>IEEE</pub><doi>10.1109/CYBERC.2009.5342169</doi><tpages>6</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Assembly Chaos Computer science Counting circuits Frequency Hardware instruction extension Instruments Optimization path profiling performance optimization Runtime sampling Sampling methods |
title | Design and implementation of a configurable hardware profiler supporting path profiling and sampling |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-17T04%3A44%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Design%20and%20implementation%20of%20a%20configurable%20hardware%20profiler%20supporting%20path%20profiling%20and%20sampling&rft.btitle=2009%20International%20Conference%20on%20Cyber-Enabled%20Distributed%20Computing%20and%20Knowledge%20Discovery&rft.au=Huizhen%20Zhang&rft.date=2009-10&rft.spage=325&rft.epage=330&rft.pages=325-330&rft.isbn=9781424452187&rft.isbn_list=142445218X&rft_id=info:doi/10.1109/CYBERC.2009.5342169&rft_dat=%3Cieee_6IE%3E5342169%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1424452198&rft.eisbn_list=9781424452194&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5342169&rfr_iscdi=true |