SEU-Susceptibility of Logical Constants in Xilinx FPGA Designs
In Xilinx Field Programmable Gate Arrays two types of logical constants, implicit and explicit, are used to prevent unspecified signals from floating. Implicit logical constants are implemented with a weak keeper circuit, called a half latch, and are used to tie off unspecified input signals to user...
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| Veröffentlicht in: | IEEE transactions on nuclear science 2009-12, Vol.56 (6), p.3527-3533 |
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| container_title | IEEE transactions on nuclear science |
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| creator | Quinn, H. Allen, G.R. Swift, G.M. Chen Wei Tseng Graham, P.S. Morgan, K.S. Ostler, P. |
| description | In Xilinx Field Programmable Gate Arrays two types of logical constants, implicit and explicit, are used to prevent unspecified signals from floating. Implicit logical constants are implemented with a weak keeper circuit, called a half latch, and are used to tie off unspecified input signals to user flip-flops. Explicit logical constants in the earlier devices are implemented using look up tables (LUTs) set to a constant value (constant LUTs) and in the newer devices are implemented using posts that provide access to the ground plane. Explicit logical constants often are used in adders and multipliers. In this paper, we will present radiation test data and analysis of the three types of logical constants. |
| doi_str_mv | 10.1109/TNS.2009.2033925 |
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| subjects | Circuit testing Circuits Clocks Constants Design engineering Devices Fault tolerance Field programmable gate arrays Flip-flops Ground plane Laboratories Latches Programmable logic arrays proton radiation effects reliability estimation Signal design Single event transient Table lookup Tables |
| title | SEU-Susceptibility of Logical Constants in Xilinx FPGA Designs |
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