Effects of guard bands and well contacts in mitigating long SETs in advanced CMOS processes

Mixed mode TCAD simulations are used to show the effects of guard bands and high density well contacts in maintaining the well potential after a single event strike and thus reduce the width of long transients in a 130-nm CMOS process. Experimental verification of the effectiveness in mitigating lon...

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Hauptverfasser:	Narasimham, B., Bhuva, B.L., Schrimpf, R.D., Massengill, L.W., Gadlage, M.J., Holman, W.T., Witulski, A.F., Robinson, W.H., Black, J.D., Benedetto, J.M., Eaton, P.H.
Format:	Tagungsbericht
Sprache:	eng ; jpn
Schlagworte:	Clocks CMOS CMOS process Combinational circuits Frequency guard band Latches Microelectronics parasitic bipolar Pulse circuits pulse width SET SEU single event transient Single event upset soft error Space vector pulse width modulation Voltage well contact
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