Scheduling Cells with Multiple Output Ports for Input-Queued Switches
With the line rate growing faster and faster, input queued switching architecture has become attractive in high performance switches and routers due to the no speedup character. In this paper, a simple efficient queue balance matching (QBM) algorithm is presented supporting cells with multiple outpu...
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creator | Zheng De-ren Wang Bin-qiang Yi Peng Li Hui |
description | With the line rate growing faster and faster, input queued switching architecture has become attractive in high performance switches and routers due to the no speedup character. In this paper, a simple efficient queue balance matching (QBM) algorithm is presented supporting cells with multiple output ports based on the multi-hop routing. The QBM algorithm combines the virtue of i SLIP and E i SLIP, and uses a multiple eligible output ports manner to efficiently balance the traffic into all input queues. Simulation results show that the throughput can be increased more than 25% comparing to iSLIP under non-uniform traffic with single iteration, and the delay performance is improved finely. It is also easy to be implemented as i SLIP. |
doi_str_mv | 10.1109/ICSAP.2009.55 |
format | Conference Proceeding |
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In this paper, a simple efficient queue balance matching (QBM) algorithm is presented supporting cells with multiple output ports based on the multi-hop routing. The QBM algorithm combines the virtue of i SLIP and E i SLIP, and uses a multiple eligible output ports manner to efficiently balance the traffic into all input queues. Simulation results show that the throughput can be increased more than 25% comparing to iSLIP under non-uniform traffic with single iteration, and the delay performance is improved finely. It is also easy to be implemented as i SLIP.</description><subject>Delay</subject><subject>Fabrics</subject><subject>matching algorithm</subject><subject>multiple output ports</subject><subject>Packet switching</subject><subject>Routing</subject><subject>scheduling</subject><subject>Scheduling algorithm</subject><subject>Signal processing</subject><subject>Switches</subject><subject>Systems engineering and theory</subject><subject>Throughput</subject><subject>Traffic control</subject><isbn>9780769535944</isbn><isbn>0769535941</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotTE1LwzAYDshAnT168pI_0Jo0SZP3OMrUwmST6nlk6RsXiVtpG8R_b0Wfy8PzScgtZwXnDO6bul3tipIxKJS6IBlow3QFSiiQckGu58SAFMDkJcnG8YPNUMpogCuybt0RuxTD6Z3WGONIv8J0pM8pTqGPSLdp6tNEd-dhGqk_D7Q5zTp_SZiwo-1cnvfjDVl4G0fM_nlJ3h7Wr_VTvtk-NvVqkweu1ZSLEq0rhWbID145LzyA9CjAO1fxX0dxJ31ZldAZazsGHB2zwnBulD0YsSR3f78BEff9ED7t8L1XvBJGavED_jJMUg</recordid><startdate>200904</startdate><enddate>200904</enddate><creator>Zheng De-ren</creator><creator>Wang Bin-qiang</creator><creator>Yi Peng</creator><creator>Li Hui</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200904</creationdate><title>Scheduling Cells with Multiple Output Ports for Input-Queued Switches</title><author>Zheng De-ren ; Wang Bin-qiang ; Yi Peng ; Li Hui</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-32eac2370e1bf5cf3f994fe39fcc61f5cf51c4f2629d8aad091ec0a381185ab83</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Delay</topic><topic>Fabrics</topic><topic>matching algorithm</topic><topic>multiple output ports</topic><topic>Packet switching</topic><topic>Routing</topic><topic>scheduling</topic><topic>Scheduling algorithm</topic><topic>Signal processing</topic><topic>Switches</topic><topic>Systems engineering and theory</topic><topic>Throughput</topic><topic>Traffic control</topic><toplevel>online_resources</toplevel><creatorcontrib>Zheng De-ren</creatorcontrib><creatorcontrib>Wang Bin-qiang</creatorcontrib><creatorcontrib>Yi Peng</creatorcontrib><creatorcontrib>Li Hui</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zheng De-ren</au><au>Wang Bin-qiang</au><au>Yi Peng</au><au>Li Hui</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Scheduling Cells with Multiple Output Ports for Input-Queued Switches</atitle><btitle>2009 International Conference on Signal Acquisition and Processing</btitle><stitle>ICSAP</stitle><date>2009-04</date><risdate>2009</risdate><spage>163</spage><epage>167</epage><pages>163-167</pages><isbn>9780769535944</isbn><isbn>0769535941</isbn><abstract>With the line rate growing faster and faster, input queued switching architecture has become attractive in high performance switches and routers due to the no speedup character. In this paper, a simple efficient queue balance matching (QBM) algorithm is presented supporting cells with multiple output ports based on the multi-hop routing. The QBM algorithm combines the virtue of i SLIP and E i SLIP, and uses a multiple eligible output ports manner to efficiently balance the traffic into all input queues. Simulation results show that the throughput can be increased more than 25% comparing to iSLIP under non-uniform traffic with single iteration, and the delay performance is improved finely. It is also easy to be implemented as i SLIP.</abstract><pub>IEEE</pub><doi>10.1109/ICSAP.2009.55</doi><tpages>5</tpages></addata></record> |
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subjects | Delay Fabrics matching algorithm multiple output ports Packet switching Routing scheduling Scheduling algorithm Signal processing Switches Systems engineering and theory Throughput Traffic control |
title | Scheduling Cells with Multiple Output Ports for Input-Queued Switches |
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