A novel CMOS monolithic analog multiplier with wide input dynamic range
A novel CMOS monolithic analog multiplier capable of operating in two quadrants is described in this paper. The multiplier incorporates a voltage-controlled variable linear resistor comprised of two FET transistors in the feedback network of an operational amplifier. This novel approach to implement...
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| creator | Hadgis, G.A. Mukund, P.R. |
| description | A novel CMOS monolithic analog multiplier capable of operating in two quadrants is described in this paper. The multiplier incorporates a voltage-controlled variable linear resistor comprised of two FET transistors in the feedback network of an operational amplifier. This novel approach to implementing an analog multiplier results in good linearity and wide dynamic range when compared to other implementations where an FET is incorporated in the feedback network of an operational amplifier. The analog multiplier, comprised of an operational amplifier and a variable linear resistor, has been designed. PSpice simulation results are given in support of the multiplier. |
| doi_str_mv | 10.1109/ICVD.1995.512130 |
| format | Conference Proceeding |
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The multiplier incorporates a voltage-controlled variable linear resistor comprised of two FET transistors in the feedback network of an operational amplifier. This novel approach to implementing an analog multiplier results in good linearity and wide dynamic range when compared to other implementations where an FET is incorporated in the feedback network of an operational amplifier. The analog multiplier, comprised of an operational amplifier and a variable linear resistor, has been designed. PSpice simulation results are given in support of the multiplier.</description><identifier>ISSN: 1063-9667</identifier><identifier>ISBN: 9780818669057</identifier><identifier>ISBN: 0818669055</identifier><identifier>EISSN: 2380-6923</identifier><identifier>DOI: 10.1109/ICVD.1995.512130</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuits ; Dynamic range ; Equations ; Feedback ; FETs ; Linearity ; Moon ; Operational amplifiers ; Resistors ; Voltage</subject><ispartof>Proceedings of the 8th International Conference on VLSI Design, 1995, p.310-314</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/512130$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,777,781,786,787,2052,4036,4037,27906,54901</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/512130$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Hadgis, G.A.</creatorcontrib><creatorcontrib>Mukund, P.R.</creatorcontrib><title>A novel CMOS monolithic analog multiplier with wide input dynamic range</title><title>Proceedings of the 8th International Conference on VLSI Design</title><addtitle>ICVD</addtitle><description>A novel CMOS monolithic analog multiplier capable of operating in two quadrants is described in this paper. The multiplier incorporates a voltage-controlled variable linear resistor comprised of two FET transistors in the feedback network of an operational amplifier. This novel approach to implementing an analog multiplier results in good linearity and wide dynamic range when compared to other implementations where an FET is incorporated in the feedback network of an operational amplifier. The analog multiplier, comprised of an operational amplifier and a variable linear resistor, has been designed. PSpice simulation results are given in support of the multiplier.</description><subject>Circuits</subject><subject>Dynamic range</subject><subject>Equations</subject><subject>Feedback</subject><subject>FETs</subject><subject>Linearity</subject><subject>Moon</subject><subject>Operational amplifiers</subject><subject>Resistors</subject><subject>Voltage</subject><issn>1063-9667</issn><issn>2380-6923</issn><isbn>9780818669057</isbn><isbn>0818669055</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1995</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotkMtOwzAURC0eEqV0j1j5BxKu7cSPZRWgVCrqgoptdRPbxch5KElB_ftGKpuZxRmdxRDyyCBlDMzzuvh6SZkxeZozzgRckRkXGhJpuLgmC6M0aKalNJCrGzJjIEVipFR35H4YfgBA56BmZLWkTfvrIi0-tp-0bps2hvE7VBQbjO2B1sc4hi4G19O_CUxhHQ1NdxypPTVYT8sem4N7ILce4-AW_z0nu7fXXfGebLardbHcJEGrMTEcXFna3PvKaJ5xyRyi0lllSy7LkgsjWYZaKXQ-s9Zj5ZW3usqEV2jQiTl5umiDc27f9aHG_rS_PCDOrfROmQ</recordid><startdate>1995</startdate><enddate>1995</enddate><creator>Hadgis, G.A.</creator><creator>Mukund, P.R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1995</creationdate><title>A novel CMOS monolithic analog multiplier with wide input dynamic range</title><author>Hadgis, G.A. ; Mukund, P.R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i87t-920ebbd5ffc9824261eaa784cdb26bb239614a877aef4ddfacf7fd8c43f7a9ae3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1995</creationdate><topic>Circuits</topic><topic>Dynamic range</topic><topic>Equations</topic><topic>Feedback</topic><topic>FETs</topic><topic>Linearity</topic><topic>Moon</topic><topic>Operational amplifiers</topic><topic>Resistors</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Hadgis, G.A.</creatorcontrib><creatorcontrib>Mukund, P.R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hadgis, G.A.</au><au>Mukund, P.R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A novel CMOS monolithic analog multiplier with wide input dynamic range</atitle><btitle>Proceedings of the 8th International Conference on VLSI Design</btitle><stitle>ICVD</stitle><date>1995</date><risdate>1995</risdate><spage>310</spage><epage>314</epage><pages>310-314</pages><issn>1063-9667</issn><eissn>2380-6923</eissn><isbn>9780818669057</isbn><isbn>0818669055</isbn><abstract>A novel CMOS monolithic analog multiplier capable of operating in two quadrants is described in this paper. The multiplier incorporates a voltage-controlled variable linear resistor comprised of two FET transistors in the feedback network of an operational amplifier. This novel approach to implementing an analog multiplier results in good linearity and wide dynamic range when compared to other implementations where an FET is incorporated in the feedback network of an operational amplifier. The analog multiplier, comprised of an operational amplifier and a variable linear resistor, has been designed. PSpice simulation results are given in support of the multiplier.</abstract><pub>IEEE</pub><doi>10.1109/ICVD.1995.512130</doi><tpages>5</tpages></addata></record> |
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| identifier | ISSN: 1063-9667 |
| ispartof | Proceedings of the 8th International Conference on VLSI Design, 1995, p.310-314 |
| issn | 1063-9667 2380-6923 |
| language | eng |
| recordid | cdi_ieee_primary_512130 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuits Dynamic range Equations Feedback FETs Linearity Moon Operational amplifiers Resistors Voltage |
| title | A novel CMOS monolithic analog multiplier with wide input dynamic range |
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