Chip Level Reliability of MANOS Cells under Operating Conditions
MT reliability of MANOS cell was examined from cell array. Lots of retention tail bits occurred even at RT. The fail cells were classified as the manner of q-loss. Defective cell lost abundant charge at early stage, while the q-loss rate of worse cell was faster and lasted in a certain period. Si-cl...
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| creator | Eun-Seok Choi Se-Jun Kim Soon-Ok Seo Hyun-Seung Yoo Kyoung-Hwan Park Sung-Wook Jung Se-Yun Lim Han-Soo Joo Gyo-Ji Kim Sang-Bum Lee Sang-Hyun Oh Jae-Chul Om Jeong-Hyong Yi Seok-Kiu Lee |
| description | MT reliability of MANOS cell was examined from cell array. Lots of retention tail bits occurred even at RT. The fail cells were classified as the manner of q-loss. Defective cell lost abundant charge at early stage, while the q-loss rate of worse cell was faster and lasted in a certain period. Si-cluster in our nitride was supposed to make the worse cell, and this cell redeemed its retention capability by reducing shallow trap in Si-rich nitride. |
| doi_str_mv | 10.1109/IMW.2009.5090584 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5090584</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5090584</ieee_id><sourcerecordid>5090584</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-133adba598cd1ad4c6479b6cb72037e7fefffa67bc648595c6ff1f0d191c8af3</originalsourceid><addsrcrecordid>eNotj09LwzAchgM6cM7eBS_5Aq35n_xujqJz0Flwgt5G0iQaqG1pq7Bv78Cd3sPz8MCL0C0lBaUE7re794IRAoUkQKQRFygDbahgQnCtmL5ES0Yl5MLwjwW6PqkGKKNMXKFsmpIjTHIpQLEleii_0oCr8Bta_BraZF1q03zEfcS79Uu9x2Vo2wn_dD6MuB7CaOfUfeKy73yaU99NN2gRbTuF7LwrtH96fCuf86rebMt1lScgc045t95ZCabx1HrRKKHBqcZpRrgOOoYYo1XanYCRIBsVI43EU6CNsZGv0N1_NYUQDsOYvu14PJzv8z_nh0v5</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Chip Level Reliability of MANOS Cells under Operating Conditions</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Eun-Seok Choi ; Se-Jun Kim ; Soon-Ok Seo ; Hyun-Seung Yoo ; Kyoung-Hwan Park ; Sung-Wook Jung ; Se-Yun Lim ; Han-Soo Joo ; Gyo-Ji Kim ; Sang-Bum Lee ; Sang-Hyun Oh ; Jae-Chul Om ; Jeong-Hyong Yi ; Seok-Kiu Lee</creator><creatorcontrib>Eun-Seok Choi ; Se-Jun Kim ; Soon-Ok Seo ; Hyun-Seung Yoo ; Kyoung-Hwan Park ; Sung-Wook Jung ; Se-Yun Lim ; Han-Soo Joo ; Gyo-Ji Kim ; Sang-Bum Lee ; Sang-Hyun Oh ; Jae-Chul Om ; Jeong-Hyong Yi ; Seok-Kiu Lee</creatorcontrib><description>MT reliability of MANOS cell was examined from cell array. Lots of retention tail bits occurred even at RT. The fail cells were classified as the manner of q-loss. Defective cell lost abundant charge at early stage, while the q-loss rate of worse cell was faster and lasted in a certain period. Si-cluster in our nitride was supposed to make the worse cell, and this cell redeemed its retention capability by reducing shallow trap in Si-rich nitride.</description><identifier>ISSN: 2159-483X</identifier><identifier>ISBN: 9781424437627</identifier><identifier>ISBN: 1424437628</identifier><identifier>DOI: 10.1109/IMW.2009.5090584</identifier><identifier>LCCN: 2008912124</identifier><language>eng</language><publisher>IEEE</publisher><subject>Bonding ; Curing ; Kinetic energy ; Nonvolatile memory ; Probability distribution ; Research and development ; Scalability ; Semiconductor device reliability ; Tail ; Temperature</subject><ispartof>2009 IEEE International Memory Workshop, 2009, p.1-2</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5090584$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5090584$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Eun-Seok Choi</creatorcontrib><creatorcontrib>Se-Jun Kim</creatorcontrib><creatorcontrib>Soon-Ok Seo</creatorcontrib><creatorcontrib>Hyun-Seung Yoo</creatorcontrib><creatorcontrib>Kyoung-Hwan Park</creatorcontrib><creatorcontrib>Sung-Wook Jung</creatorcontrib><creatorcontrib>Se-Yun Lim</creatorcontrib><creatorcontrib>Han-Soo Joo</creatorcontrib><creatorcontrib>Gyo-Ji Kim</creatorcontrib><creatorcontrib>Sang-Bum Lee</creatorcontrib><creatorcontrib>Sang-Hyun Oh</creatorcontrib><creatorcontrib>Jae-Chul Om</creatorcontrib><creatorcontrib>Jeong-Hyong Yi</creatorcontrib><creatorcontrib>Seok-Kiu Lee</creatorcontrib><title>Chip Level Reliability of MANOS Cells under Operating Conditions</title><title>2009 IEEE International Memory Workshop</title><addtitle>IMW</addtitle><description>MT reliability of MANOS cell was examined from cell array. Lots of retention tail bits occurred even at RT. The fail cells were classified as the manner of q-loss. Defective cell lost abundant charge at early stage, while the q-loss rate of worse cell was faster and lasted in a certain period. Si-cluster in our nitride was supposed to make the worse cell, and this cell redeemed its retention capability by reducing shallow trap in Si-rich nitride.</description><subject>Bonding</subject><subject>Curing</subject><subject>Kinetic energy</subject><subject>Nonvolatile memory</subject><subject>Probability distribution</subject><subject>Research and development</subject><subject>Scalability</subject><subject>Semiconductor device reliability</subject><subject>Tail</subject><subject>Temperature</subject><issn>2159-483X</issn><isbn>9781424437627</isbn><isbn>1424437628</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj09LwzAchgM6cM7eBS_5Aq35n_xujqJz0Flwgt5G0iQaqG1pq7Bv78Cd3sPz8MCL0C0lBaUE7re794IRAoUkQKQRFygDbahgQnCtmL5ES0Yl5MLwjwW6PqkGKKNMXKFsmpIjTHIpQLEleii_0oCr8Bta_BraZF1q03zEfcS79Uu9x2Vo2wn_dD6MuB7CaOfUfeKy73yaU99NN2gRbTuF7LwrtH96fCuf86rebMt1lScgc045t95ZCabx1HrRKKHBqcZpRrgOOoYYo1XanYCRIBsVI43EU6CNsZGv0N1_NYUQDsOYvu14PJzv8z_nh0v5</recordid><startdate>200905</startdate><enddate>200905</enddate><creator>Eun-Seok Choi</creator><creator>Se-Jun Kim</creator><creator>Soon-Ok Seo</creator><creator>Hyun-Seung Yoo</creator><creator>Kyoung-Hwan Park</creator><creator>Sung-Wook Jung</creator><creator>Se-Yun Lim</creator><creator>Han-Soo Joo</creator><creator>Gyo-Ji Kim</creator><creator>Sang-Bum Lee</creator><creator>Sang-Hyun Oh</creator><creator>Jae-Chul Om</creator><creator>Jeong-Hyong Yi</creator><creator>Seok-Kiu Lee</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200905</creationdate><title>Chip Level Reliability of MANOS Cells under Operating Conditions</title><author>Eun-Seok Choi ; Se-Jun Kim ; Soon-Ok Seo ; Hyun-Seung Yoo ; Kyoung-Hwan Park ; Sung-Wook Jung ; Se-Yun Lim ; Han-Soo Joo ; Gyo-Ji Kim ; Sang-Bum Lee ; Sang-Hyun Oh ; Jae-Chul Om ; Jeong-Hyong Yi ; Seok-Kiu Lee</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-133adba598cd1ad4c6479b6cb72037e7fefffa67bc648595c6ff1f0d191c8af3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Bonding</topic><topic>Curing</topic><topic>Kinetic energy</topic><topic>Nonvolatile memory</topic><topic>Probability distribution</topic><topic>Research and development</topic><topic>Scalability</topic><topic>Semiconductor device reliability</topic><topic>Tail</topic><topic>Temperature</topic><toplevel>online_resources</toplevel><creatorcontrib>Eun-Seok Choi</creatorcontrib><creatorcontrib>Se-Jun Kim</creatorcontrib><creatorcontrib>Soon-Ok Seo</creatorcontrib><creatorcontrib>Hyun-Seung Yoo</creatorcontrib><creatorcontrib>Kyoung-Hwan Park</creatorcontrib><creatorcontrib>Sung-Wook Jung</creatorcontrib><creatorcontrib>Se-Yun Lim</creatorcontrib><creatorcontrib>Han-Soo Joo</creatorcontrib><creatorcontrib>Gyo-Ji Kim</creatorcontrib><creatorcontrib>Sang-Bum Lee</creatorcontrib><creatorcontrib>Sang-Hyun Oh</creatorcontrib><creatorcontrib>Jae-Chul Om</creatorcontrib><creatorcontrib>Jeong-Hyong Yi</creatorcontrib><creatorcontrib>Seok-Kiu Lee</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Eun-Seok Choi</au><au>Se-Jun Kim</au><au>Soon-Ok Seo</au><au>Hyun-Seung Yoo</au><au>Kyoung-Hwan Park</au><au>Sung-Wook Jung</au><au>Se-Yun Lim</au><au>Han-Soo Joo</au><au>Gyo-Ji Kim</au><au>Sang-Bum Lee</au><au>Sang-Hyun Oh</au><au>Jae-Chul Om</au><au>Jeong-Hyong Yi</au><au>Seok-Kiu Lee</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Chip Level Reliability of MANOS Cells under Operating Conditions</atitle><btitle>2009 IEEE International Memory Workshop</btitle><stitle>IMW</stitle><date>2009-05</date><risdate>2009</risdate><spage>1</spage><epage>2</epage><pages>1-2</pages><issn>2159-483X</issn><isbn>9781424437627</isbn><isbn>1424437628</isbn><abstract>MT reliability of MANOS cell was examined from cell array. Lots of retention tail bits occurred even at RT. The fail cells were classified as the manner of q-loss. Defective cell lost abundant charge at early stage, while the q-loss rate of worse cell was faster and lasted in a certain period. Si-cluster in our nitride was supposed to make the worse cell, and this cell redeemed its retention capability by reducing shallow trap in Si-rich nitride.</abstract><pub>IEEE</pub><doi>10.1109/IMW.2009.5090584</doi><tpages>2</tpages></addata></record> |
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| identifier | ISSN: 2159-483X |
| ispartof | 2009 IEEE International Memory Workshop, 2009, p.1-2 |
| issn | 2159-483X |
| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Bonding Curing Kinetic energy Nonvolatile memory Probability distribution Research and development Scalability Semiconductor device reliability Tail Temperature |
| title | Chip Level Reliability of MANOS Cells under Operating Conditions |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T06%3A25%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Chip%20Level%20Reliability%20of%20MANOS%20Cells%20under%20Operating%20Conditions&rft.btitle=2009%20IEEE%20International%20Memory%20Workshop&rft.au=Eun-Seok%20Choi&rft.date=2009-05&rft.spage=1&rft.epage=2&rft.pages=1-2&rft.issn=2159-483X&rft.isbn=9781424437627&rft.isbn_list=1424437628&rft_id=info:doi/10.1109/IMW.2009.5090584&rft_dat=%3Cieee_6IE%3E5090584%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5090584&rfr_iscdi=true |