Load miss performance analysis methodology using the PowerPC 604 performance monitor for OLTP workloads
This paper describes a methodology via which the PowerPC 604 Micro Processor (abbreviated 604 in the remainder of this paper) performance monitor can be used to examine and contrast the effects of hardware variations on system performance. We present performance measurement data and analysis of an O...
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creator | Welbon, E.H. Moore, R.S. Levine, F.E. Roth, C.P. |
description | This paper describes a methodology via which the PowerPC 604 Micro Processor (abbreviated 604 in the remainder of this paper) performance monitor can be used to examine and contrast the effects of hardware variations on system performance. We present performance measurement data and analysis of an On-Line Transaction Processing (OLTP) workload, which are derived via repeated runs using a database software engine with several different memory and processor speeds. We show for our workload that variations in the easily measured load miss sojourn can be used to approximate the valuable but difficult to measure composite cache miss penalty. We also show interesting variations in bus utilization versus bus to processor clock ratios. |
doi_str_mv | 10.1109/CMPCON.1996.501756 |
format | Conference Proceeding |
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We also show interesting variations in bus utilization versus bus to processor clock ratios.</description><subject>Clocks</subject><subject>Data analysis</subject><subject>Engines</subject><subject>Hardware</subject><subject>Measurement</subject><subject>Monitoring</subject><subject>Performance analysis</subject><subject>Software performance</subject><subject>System performance</subject><subject>Transaction databases</subject><issn>1063-6390</issn><issn>2375-0960</issn><isbn>0818674148</isbn><isbn>9780818674143</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1996</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVUDtPwzAYtHhItIU_wOSJLeVznHy2RxTxkgLNUObIxHYbSOJip6r674lUFqaTTvfQHSG3DJaMgbov3qpi9b5kSuEyByZyPCOzlIs8AYVwTuYgmUSRsUxekBkD5AlyBVdkHuMXQCq4lDOyKb02tG9jpDsbnA-9HhpL9aC7Y2wj7e249cZ3fnOk-9gOGzpuLa38wYaqoAjZP1vvh3b0gU4EXZXrih58-O6mhnhNLp3uor35wwX5eHpcFy9JuXp-LR7KpE2Bjwk3ueCITDoE0KppdGYao_IMlWBoJBirmHMGs3QaBsKJ7DNl2Dipc9k4zhfk7pS7C_5nb-NYT9sa23V6sH4f6xSZEMDVJLw9CVtrbb0Lba_DsT4dyX8BNwRmIw</recordid><startdate>1996</startdate><enddate>1996</enddate><creator>Welbon, E.H.</creator><creator>Moore, R.S.</creator><creator>Levine, F.E.</creator><creator>Roth, C.P.</creator><general>IEEE Comput. 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Technologies for the Information Superhighway Digest of Papers</btitle><stitle>CMPCON</stitle><date>1996</date><risdate>1996</risdate><spage>111</spage><epage>116</epage><pages>111-116</pages><issn>1063-6390</issn><eissn>2375-0960</eissn><isbn>0818674148</isbn><isbn>9780818674143</isbn><abstract>This paper describes a methodology via which the PowerPC 604 Micro Processor (abbreviated 604 in the remainder of this paper) performance monitor can be used to examine and contrast the effects of hardware variations on system performance. We present performance measurement data and analysis of an On-Line Transaction Processing (OLTP) workload, which are derived via repeated runs using a database software engine with several different memory and processor speeds. We show for our workload that variations in the easily measured load miss sojourn can be used to approximate the valuable but difficult to measure composite cache miss penalty. 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identifier | ISSN: 1063-6390 |
ispartof | COMPCON '96. Technologies for the Information Superhighway Digest of Papers, 1996, p.111-116 |
issn | 1063-6390 2375-0960 |
language | eng |
recordid | cdi_ieee_primary_501756 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Clocks Data analysis Engines Hardware Measurement Monitoring Performance analysis Software performance System performance Transaction databases |
title | Load miss performance analysis methodology using the PowerPC 604 performance monitor for OLTP workloads |
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