An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM

This paper presents a three-dimensional (3D) system integration of a commercial processor and a memory by using inductive coupling. A 90 nm CMOS 8-core processor, back-grinded to a thickness of 50 mum, is mounted face down on a package by C4 bump. A 65 nm CMOS 1 MB SRAM of the same thickness is glue...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Niitsu, K., Shimazaki, Y., Sugimori, Y., Kohama, Y., Kasuga, K., Nonomura, I., Saen, M., Komatsu, S., Osada, K., Irie, N., Hattori, T., Hasegawa, A., Kuroda, T.
Format:	Tagungsbericht
Sprache:	eng ; jpn
Schlagworte:	CMOS process Coupling circuits Inductors Interference Power dissipation Random access memory Registers Space vector pulse width modulation Timing jitter Voltage control
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!