Design for board trace reliability of WLCSP under drop test
Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSP nltrade ), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. Failure mech...
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creator | Tong Yan Tee Hun Shen Ng Syed, A. Anderson, R. Choong Peng Khoo Rogers, B. |
description | Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSP nltrade ), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. Failure mechanism of WLCSP under drop test has been established. Depending on type of WLCSP and test board design, 3 primary failure modes can be observed, i.e. copper (Cu) board trace crack, Cu RDL (Redistribution Layer) vertical crack and Cu/UBM (Under Bump Metallization) delamination. CSP nl can exhibit distinct failure modes under different test board and/or CSP nl designs, resulting in a vast difference in drop test lifetimes. The primary failure mode is shifted whenever the weakest link is removed through design improvement. This paper will focus on detailed analysis of copper board trace crack under drop test, using an integrated approach of testing, failure analysis, material characterization and modeling. Board design guidelines are formulated to understand the effects of I/O position, board trace routing direction, board trace width, tear drop design, PCB pad size, stack-up thickness, and alloy materials on board trace reliability. Comparison is also made on possible impact on Cu RDL reliability. |
doi_str_mv | 10.1109/ESIME.2009.4938518 |
format | Conference Proceeding |
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Comparison is also made on possible impact on Cu RDL reliability.</description><subject>Copper</subject><subject>Delamination</subject><subject>Failure analysis</subject><subject>Guidelines</subject><subject>Life testing</subject><subject>Materials reliability</subject><subject>Materials testing</subject><subject>Metallization</subject><subject>Product development</subject><subject>Routing</subject><isbn>1424441609</isbn><isbn>9781424441600</isbn><isbn>1424441595</isbn><isbn>9781424441594</isbn><isbn>1424441617</isbn><isbn>9781424441617</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFj89Kw0AYxFekoK19Ab3sCyTu_-yHJ4lRCxGFFjyW3ey3shKbsomHvr0VC85lGH7DwBByzVnJOYPbZr16aUrBGJQKpNXcnpE5V0IpxQ2vzv8DgxmZ_xaBcW34BVmO4yc7SmnJQF6Suwcc08eOxiFTP7gc6JRdhzRjn5xPfZoOdIj0va3Xb_R7FzDTkIc9nXCcrsgsun7E5ckXZPPYbOrnon19WtX3bZGATYW13ngXAkqstIiiM1WIDqyKWgvrQ8etlghBewRpQCrpDCgBR6wrx6RckJu_2YSI231OXy4ftqfj8gc87Eke</recordid><startdate>200904</startdate><enddate>200904</enddate><creator>Tong Yan Tee</creator><creator>Hun Shen Ng</creator><creator>Syed, A.</creator><creator>Anderson, R.</creator><creator>Choong Peng Khoo</creator><creator>Rogers, B.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200904</creationdate><title>Design for board trace reliability of WLCSP under drop test</title><author>Tong Yan Tee ; Hun Shen Ng ; Syed, A. ; Anderson, R. ; Choong Peng Khoo ; Rogers, B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-88b6badde3e752f2c67dfa984f5528bdc1853e9d5be9369343a69429f5557a033</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Copper</topic><topic>Delamination</topic><topic>Failure analysis</topic><topic>Guidelines</topic><topic>Life testing</topic><topic>Materials reliability</topic><topic>Materials testing</topic><topic>Metallization</topic><topic>Product development</topic><topic>Routing</topic><toplevel>online_resources</toplevel><creatorcontrib>Tong Yan Tee</creatorcontrib><creatorcontrib>Hun Shen Ng</creatorcontrib><creatorcontrib>Syed, A.</creatorcontrib><creatorcontrib>Anderson, R.</creatorcontrib><creatorcontrib>Choong Peng Khoo</creatorcontrib><creatorcontrib>Rogers, B.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tong Yan Tee</au><au>Hun Shen Ng</au><au>Syed, A.</au><au>Anderson, R.</au><au>Choong Peng Khoo</au><au>Rogers, B.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Design for board trace reliability of WLCSP under drop test</atitle><btitle>EuroSimE 2009 - 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems</btitle><stitle>ESIME</stitle><date>2009-04</date><risdate>2009</risdate><spage>1</spage><epage>8</epage><pages>1-8</pages><isbn>1424441609</isbn><isbn>9781424441600</isbn><isbn>1424441595</isbn><isbn>9781424441594</isbn><eisbn>1424441617</eisbn><eisbn>9781424441617</eisbn><abstract>Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSP nltrade ), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. Failure mechanism of WLCSP under drop test has been established. Depending on type of WLCSP and test board design, 3 primary failure modes can be observed, i.e. copper (Cu) board trace crack, Cu RDL (Redistribution Layer) vertical crack and Cu/UBM (Under Bump Metallization) delamination. CSP nl can exhibit distinct failure modes under different test board and/or CSP nl designs, resulting in a vast difference in drop test lifetimes. The primary failure mode is shifted whenever the weakest link is removed through design improvement. This paper will focus on detailed analysis of copper board trace crack under drop test, using an integrated approach of testing, failure analysis, material characterization and modeling. Board design guidelines are formulated to understand the effects of I/O position, board trace routing direction, board trace width, tear drop design, PCB pad size, stack-up thickness, and alloy materials on board trace reliability. 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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Copper Delamination Failure analysis Guidelines Life testing Materials reliability Materials testing Metallization Product development Routing |
title | Design for board trace reliability of WLCSP under drop test |
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