Si bipolar 14 Gb/s 1:4-demultiplexer IC for system applications
A 1:4-demultiplexer IC meeting the essential requirements for lightwave communication systems has been designed based on a 21 GHz f/sub T/ 0.4 /spl mu/m Si bipolar process. The circuit provides features such as bit-rotation control, clock enable control, outputs aligned in time, and phase aligner fo...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 1996-01, Vol.31 (1), p.54-60 |
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| Sprache: | eng |
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| container_end_page | 60 |
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| container_issue | 1 |
| container_start_page | 54 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 31 |
| creator | Zhihao Lao Langmann, U. Albers, J.N. Schlag, E. Clawin, D. |
| description | A 1:4-demultiplexer IC meeting the essential requirements for lightwave communication systems has been designed based on a 21 GHz f/sub T/ 0.4 /spl mu/m Si bipolar process. The circuit provides features such as bit-rotation control, clock enable control, outputs aligned in time, and phase aligner for clock signals. It operates up to 14 Gb/s (14 GHz) with a phase margin of /spl ges/250/spl deg/. The power consumption is 2 W with a -4.5 V supply. 1:16-demultiplexer operation is demonstrated on the basis of 1:4-demultiplexer IC's at 10 Gb/s. |
| doi_str_mv | 10.1109/4.485865 |
| format | Article |
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The circuit provides features such as bit-rotation control, clock enable control, outputs aligned in time, and phase aligner for clock signals. It operates up to 14 Gb/s (14 GHz) with a phase margin of /spl ges/250/spl deg/. The power consumption is 2 W with a -4.5 V supply. 1:16-demultiplexer operation is demonstrated on the basis of 1:4-demultiplexer IC's at 10 Gb/s.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.485865</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>IEEE</publisher><subject>Application specific integrated circuits ; Bipolar integrated circuits ; Bit rate ; Clocks ; Communication system control ; Control systems ; Delay lines ; Frequency conversion ; SONET ; Synchronous digital hierarchy</subject><ispartof>IEEE journal of solid-state circuits, 1996-01, Vol.31 (1), p.54-60</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c275t-3d09cce193b859261ec6350698b39a2005348112d837580e5a934218b025bc633</citedby><cites>FETCH-LOGICAL-c275t-3d09cce193b859261ec6350698b39a2005348112d837580e5a934218b025bc633</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/485865$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/485865$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Zhihao Lao</creatorcontrib><creatorcontrib>Langmann, U.</creatorcontrib><creatorcontrib>Albers, J.N.</creatorcontrib><creatorcontrib>Schlag, E.</creatorcontrib><creatorcontrib>Clawin, D.</creatorcontrib><title>Si bipolar 14 Gb/s 1:4-demultiplexer IC for system applications</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A 1:4-demultiplexer IC meeting the essential requirements for lightwave communication systems has been designed based on a 21 GHz f/sub T/ 0.4 /spl mu/m Si bipolar process. The circuit provides features such as bit-rotation control, clock enable control, outputs aligned in time, and phase aligner for clock signals. It operates up to 14 Gb/s (14 GHz) with a phase margin of /spl ges/250/spl deg/. The power consumption is 2 W with a -4.5 V supply. 1:16-demultiplexer operation is demonstrated on the basis of 1:4-demultiplexer IC's at 10 Gb/s.</description><subject>Application specific integrated circuits</subject><subject>Bipolar integrated circuits</subject><subject>Bit rate</subject><subject>Clocks</subject><subject>Communication system control</subject><subject>Control systems</subject><subject>Delay lines</subject><subject>Frequency conversion</subject><subject>SONET</subject><subject>Synchronous digital hierarchy</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1996</creationdate><recordtype>article</recordtype><recordid>eNo90E1LAzEQBuAgCtYqePaUk3jZNpOPbeJFZNFaKHhQwVvIplOIZLtrsgX7713Z4mkY5mF4eQm5BjYDYGYuZ1IrXaoTMgGldAEL8XlKJoyBLgxn7Jxc5Pw1rFJqmJCHt0Dr0LXRJQqSLut5pnAviw02-9iHLuIPJrqq6LZNNB9yjw11XReDd31od_mSnG1dzHh1nFPy8fz0Xr0U69flqnpcF54vVF-IDTPeIxhRa2V4CehLoVhpdC2MG2IpMcQBvtFioTRD5YyQHHTNuKoHKqbkdvzbpfZ7j7m3TcgeY3Q7bPfZcl0yIUEP8G6EPrU5J9zaLoXGpYMFZv8astKODQ30ZqQBEf_Z8fgLUvdc_A</recordid><startdate>199601</startdate><enddate>199601</enddate><creator>Zhihao Lao</creator><creator>Langmann, U.</creator><creator>Albers, J.N.</creator><creator>Schlag, E.</creator><creator>Clawin, D.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>199601</creationdate><title>Si bipolar 14 Gb/s 1:4-demultiplexer IC for system applications</title><author>Zhihao Lao ; Langmann, U. ; Albers, J.N. ; Schlag, E. ; Clawin, D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c275t-3d09cce193b859261ec6350698b39a2005348112d837580e5a934218b025bc633</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1996</creationdate><topic>Application specific integrated circuits</topic><topic>Bipolar integrated circuits</topic><topic>Bit rate</topic><topic>Clocks</topic><topic>Communication system control</topic><topic>Control systems</topic><topic>Delay lines</topic><topic>Frequency conversion</topic><topic>SONET</topic><topic>Synchronous digital hierarchy</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Zhihao Lao</creatorcontrib><creatorcontrib>Langmann, U.</creatorcontrib><creatorcontrib>Albers, J.N.</creatorcontrib><creatorcontrib>Schlag, E.</creatorcontrib><creatorcontrib>Clawin, D.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhihao Lao</au><au>Langmann, U.</au><au>Albers, J.N.</au><au>Schlag, E.</au><au>Clawin, D.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Si bipolar 14 Gb/s 1:4-demultiplexer IC for system applications</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1996-01</date><risdate>1996</risdate><volume>31</volume><issue>1</issue><spage>54</spage><epage>60</epage><pages>54-60</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A 1:4-demultiplexer IC meeting the essential requirements for lightwave communication systems has been designed based on a 21 GHz f/sub T/ 0.4 /spl mu/m Si bipolar process. The circuit provides features such as bit-rotation control, clock enable control, outputs aligned in time, and phase aligner for clock signals. It operates up to 14 Gb/s (14 GHz) with a phase margin of /spl ges/250/spl deg/. The power consumption is 2 W with a -4.5 V supply. 1:16-demultiplexer operation is demonstrated on the basis of 1:4-demultiplexer IC's at 10 Gb/s.</abstract><pub>IEEE</pub><doi>10.1109/4.485865</doi><tpages>7</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 1996-01, Vol.31 (1), p.54-60 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_ieee_primary_485865 |
| source | IEEE Electronic Library (IEL) |
| subjects | Application specific integrated circuits Bipolar integrated circuits Bit rate Clocks Communication system control Control systems Delay lines Frequency conversion SONET Synchronous digital hierarchy |
| title | Si bipolar 14 Gb/s 1:4-demultiplexer IC for system applications |
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