A single-chip 900 MHz CMOS receiver front-end with a high performance low-IF topology

An analog receiver front end chip realized in a 0.7 /spl mu/m CMOS technology is presented. It uses a new, high performance, downconverter topology, called double quadrature downconverter, that achieves a phase accuracy of less than 0.3/spl deg/ in a large passband around 900 MHz, without requiring...

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Veröffentlicht in:	IEEE journal of solid-state circuits 1995-12, Vol.30 (12), p.1483-1492
Hauptverfasser:	Crols, J., Steyaert, M.S.J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Application software Baseband CMOS technology Mirrors Passband RF signals Signal processing Topology Transceivers Voltage
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