Fully Automatical Test and Qualification System for a High Endurance Embedded EEPROM Module
Qualifying a high temperature, high endurance and high reliability integrated EEPROM process module according the JEDEC and AEC standard needs a large number of tested devices. Correlations of various analog and digital measurements must be done at different supply voltages, temperature conditions a...
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creator | Fellner, J. Schatzberger, G. Wiesner, A. |
description | Qualifying a high temperature, high endurance and high reliability integrated EEPROM process module according the JEDEC and AEC standard needs a large number of tested devices. Correlations of various analog and digital measurements must be done at different supply voltages, temperature conditions and with process variations to ensure a stable high yielding process module. Long program and erase times (milliseconds) for an EEPROM process option result in time consuming measurements. The costs of such a qualification will be comparatively high if all tests are done with production test equipment. Therefore, a test chip concept allowing a wide range of memory sizes was defined for use with a standard PLCC68 package. This package is able to withstand temperatures up to 180degC. Based on the test chip, a parallel, low cost test system was developed enabling the measurement of 96 devices in parallel and hence significantly reducing the test and qualification time and costs. |
doi_str_mv | 10.1109/IRWS.2008.4796100 |
format | Conference Proceeding |
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Correlations of various analog and digital measurements must be done at different supply voltages, temperature conditions and with process variations to ensure a stable high yielding process module. Long program and erase times (milliseconds) for an EEPROM process option result in time consuming measurements. The costs of such a qualification will be comparatively high if all tests are done with production test equipment. Therefore, a test chip concept allowing a wide range of memory sizes was defined for use with a standard PLCC68 package. This package is able to withstand temperatures up to 180degC. Based on the test chip, a parallel, low cost test system was developed enabling the measurement of 96 devices in parallel and hence significantly reducing the test and qualification time and costs.</description><identifier>ISSN: 1930-8841</identifier><identifier>ISBN: 9781424421947</identifier><identifier>ISBN: 1424421942</identifier><identifier>EISSN: 2374-8036</identifier><identifier>EISBN: 9781424421954</identifier><identifier>EISBN: 1424421950</identifier><identifier>DOI: 10.1109/IRWS.2008.4796100</identifier><language>eng</language><publisher>IEEE</publisher><subject>Automatic testing ; Costs ; EPROM ; Packaging machines ; Qualifications ; Semiconductor device measurement ; System testing ; Temperature ; Time measurement ; Voltage</subject><ispartof>2008 IEEE International Integrated Reliability Workshop Final Report, 2008, p.118-120</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4796100$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4796100$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fellner, J.</creatorcontrib><creatorcontrib>Schatzberger, G.</creatorcontrib><creatorcontrib>Wiesner, A.</creatorcontrib><title>Fully Automatical Test and Qualification System for a High Endurance Embedded EEPROM Module</title><title>2008 IEEE International Integrated Reliability Workshop Final Report</title><addtitle>IRWS</addtitle><description>Qualifying a high temperature, high endurance and high reliability integrated EEPROM process module according the JEDEC and AEC standard needs a large number of tested devices. Correlations of various analog and digital measurements must be done at different supply voltages, temperature conditions and with process variations to ensure a stable high yielding process module. Long program and erase times (milliseconds) for an EEPROM process option result in time consuming measurements. The costs of such a qualification will be comparatively high if all tests are done with production test equipment. Therefore, a test chip concept allowing a wide range of memory sizes was defined for use with a standard PLCC68 package. This package is able to withstand temperatures up to 180degC. Based on the test chip, a parallel, low cost test system was developed enabling the measurement of 96 devices in parallel and hence significantly reducing the test and qualification time and costs.</description><subject>Automatic testing</subject><subject>Costs</subject><subject>EPROM</subject><subject>Packaging machines</subject><subject>Qualifications</subject><subject>Semiconductor device measurement</subject><subject>System testing</subject><subject>Temperature</subject><subject>Time measurement</subject><subject>Voltage</subject><issn>1930-8841</issn><issn>2374-8036</issn><isbn>9781424421947</isbn><isbn>1424421942</isbn><isbn>9781424421954</isbn><isbn>1424421950</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVkMlOwzAURc0kUUo_ALHxD6Q8D4mdZVWlg9Sq0BaxYFE9xzYYZUAZFvl7kOiG1ZXOkc7iEvLAYMoYpE_r_dthygH0VKo0YQAXZJIqzSSXkrM0lpdkxIWSkQaRXP1zUl2TEUsFRFpLdkvu2vYLgAMTekTeF31RDHTWd3WJXcixoEfXdhQrS196LIL_ZV2oK3oY2s6V1NcNRboKH580q2zfYJU7mpXGWesszbLn_W5Lt7XtC3dPbjwWrZucd0xeF9lxvoo2u-V6PttEgam4i4SIQSEDZlLLuQbMYxGbxIhYS6O0kt7lmnkUIrGeJ8pK5N5yxESb3HAnxuTxrxucc6fvJpTYDKfzT-IHauxW6g</recordid><startdate>200810</startdate><enddate>200810</enddate><creator>Fellner, J.</creator><creator>Schatzberger, G.</creator><creator>Wiesner, A.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200810</creationdate><title>Fully Automatical Test and Qualification System for a High Endurance Embedded EEPROM Module</title><author>Fellner, J. ; Schatzberger, G. ; Wiesner, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-33507a101b9d2280ac535b6b3584b7874fec81fa336df267d4a2fd2aa68bcb2e3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Automatic testing</topic><topic>Costs</topic><topic>EPROM</topic><topic>Packaging machines</topic><topic>Qualifications</topic><topic>Semiconductor device measurement</topic><topic>System testing</topic><topic>Temperature</topic><topic>Time measurement</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Fellner, J.</creatorcontrib><creatorcontrib>Schatzberger, G.</creatorcontrib><creatorcontrib>Wiesner, A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fellner, J.</au><au>Schatzberger, G.</au><au>Wiesner, A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Fully Automatical Test and Qualification System for a High Endurance Embedded EEPROM Module</atitle><btitle>2008 IEEE International Integrated Reliability Workshop Final Report</btitle><stitle>IRWS</stitle><date>2008-10</date><risdate>2008</risdate><spage>118</spage><epage>120</epage><pages>118-120</pages><issn>1930-8841</issn><eissn>2374-8036</eissn><isbn>9781424421947</isbn><isbn>1424421942</isbn><eisbn>9781424421954</eisbn><eisbn>1424421950</eisbn><abstract>Qualifying a high temperature, high endurance and high reliability integrated EEPROM process module according the JEDEC and AEC standard needs a large number of tested devices. Correlations of various analog and digital measurements must be done at different supply voltages, temperature conditions and with process variations to ensure a stable high yielding process module. Long program and erase times (milliseconds) for an EEPROM process option result in time consuming measurements. The costs of such a qualification will be comparatively high if all tests are done with production test equipment. Therefore, a test chip concept allowing a wide range of memory sizes was defined for use with a standard PLCC68 package. This package is able to withstand temperatures up to 180degC. Based on the test chip, a parallel, low cost test system was developed enabling the measurement of 96 devices in parallel and hence significantly reducing the test and qualification time and costs.</abstract><pub>IEEE</pub><doi>10.1109/IRWS.2008.4796100</doi><tpages>3</tpages></addata></record> |
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identifier | ISSN: 1930-8841 |
ispartof | 2008 IEEE International Integrated Reliability Workshop Final Report, 2008, p.118-120 |
issn | 1930-8841 2374-8036 |
language | eng |
recordid | cdi_ieee_primary_4796100 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Automatic testing Costs EPROM Packaging machines Qualifications Semiconductor device measurement System testing Temperature Time measurement Voltage |
title | Fully Automatical Test and Qualification System for a High Endurance Embedded EEPROM Module |
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