LFSR based hybrid pattern scheme achieving low power dissipation and high fault coverage

This paper presents a low hardware overhead scan-based test pattern generator (TPG) that can reduce switching activity in circuit under test (CUT) during test and also achieve very high fault coverage with reasonable lengths of test sequences. The proposed TPG is comprised of two TPGs: seed selected...

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Bibliographische Detailangaben

Hauptverfasser:	Islam, S.Z., Ali, M.A.M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Benchmark testing Circuit faults Circuit testing Costs Electrical fault detection Fault detection Hardware Power dissipation Switching circuits Test pattern generators
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