Research on the Reconfigurable Image Processing System
In view of problems of the processing performance and system flexibility for the current image processing system, propose an image processing system using reconfigurable technology. Studying on the theory of dynamic reconfigurable technology and the feature of reconfigurable system, analyzing the ex...
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| creator | Chang-le Li Ji-zhuang Fan Jie Zhao |
| description | In view of problems of the processing performance and system flexibility for the current image processing system, propose an image processing system using reconfigurable technology. Studying on the theory of dynamic reconfigurable technology and the feature of reconfigurable system, analyzing the existent problem at present in the image processing system, making the use feature of multi-reconfiguration for FPGA (field programmable gate array), design the reconfigurable image processing system. On the basis of research on the distribute algorithm and the theory of the reconfigurable algorithm, complete the image processing algorithm which can be time-sharing reconfiguration. Implement the LoG (Laplacian of Gaussian) operator and Sobel operator in FPGA, and verify the feasibility and flexibility of system design. |
| doi_str_mv | 10.1109/IITA.2008.271 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4739580</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4739580</ieee_id><sourcerecordid>4739580</sourcerecordid><originalsourceid>FETCH-LOGICAL-i241t-6f010a6aad1cf67198f872a339b05b14443c8fa3359e429cb1d13b9cae7ce6b93</originalsourceid><addsrcrecordid>eNotjUtLw0AUhQekoNYsXbnJH0i8N_NeluIjUFBqXZeZ6Z000iSSiYv-eyN1dc7Hge8wdo9QIoJ9rOvdqqwATFlpvGKZ1Qa0spKLuS3Y7d9kwUiU1yxL6QsA0CqNUt4wtaVEbgzHfOjz6Uj5lsLQx7b5GZ0_UV53rqH8fRwCpdT2Tf5xThN1d2wR3SlR9p9L9vn8tFu_Fpu3l3q92hRtJXAqVAQEp5w7YIjzozXR6Mpxbj1Ij0IIHkycWVoSlQ0eD8i9DY50IOUtX7KHi7clov332HZuPO-F5lYa4L98t0Xk</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Research on the Reconfigurable Image Processing System</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Chang-le Li ; Ji-zhuang Fan ; Jie Zhao</creator><creatorcontrib>Chang-le Li ; Ji-zhuang Fan ; Jie Zhao</creatorcontrib><description>In view of problems of the processing performance and system flexibility for the current image processing system, propose an image processing system using reconfigurable technology. Studying on the theory of dynamic reconfigurable technology and the feature of reconfigurable system, analyzing the existent problem at present in the image processing system, making the use feature of multi-reconfiguration for FPGA (field programmable gate array), design the reconfigurable image processing system. On the basis of research on the distribute algorithm and the theory of the reconfigurable algorithm, complete the image processing algorithm which can be time-sharing reconfiguration. Implement the LoG (Laplacian of Gaussian) operator and Sobel operator in FPGA, and verify the feasibility and flexibility of system design.</description><identifier>ISBN: 9780769534978</identifier><identifier>ISBN: 076953497X</identifier><identifier>DOI: 10.1109/IITA.2008.271</identifier><identifier>LCCN: 2008908515</identifier><language>eng</language><publisher>IEEE</publisher><subject>Control systems ; dynamic reconfiguration ; Field programmable gate arrays ; FPGA ; Image analysis ; Image processing ; Image reconstruction ; Information technology ; Intelligent robots ; Laboratories ; Logic programming ; reconfigurable computing ; Reconfigurable logic ; total reconfiguration</subject><ispartof>2008 Second International Symposium on Intelligent Information Technology Application, 2008, Vol.1, p.284-288</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4739580$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,27904,54899</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4739580$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chang-le Li</creatorcontrib><creatorcontrib>Ji-zhuang Fan</creatorcontrib><creatorcontrib>Jie Zhao</creatorcontrib><title>Research on the Reconfigurable Image Processing System</title><title>2008 Second International Symposium on Intelligent Information Technology Application</title><addtitle>IITA</addtitle><description>In view of problems of the processing performance and system flexibility for the current image processing system, propose an image processing system using reconfigurable technology. Studying on the theory of dynamic reconfigurable technology and the feature of reconfigurable system, analyzing the existent problem at present in the image processing system, making the use feature of multi-reconfiguration for FPGA (field programmable gate array), design the reconfigurable image processing system. On the basis of research on the distribute algorithm and the theory of the reconfigurable algorithm, complete the image processing algorithm which can be time-sharing reconfiguration. Implement the LoG (Laplacian of Gaussian) operator and Sobel operator in FPGA, and verify the feasibility and flexibility of system design.</description><subject>Control systems</subject><subject>dynamic reconfiguration</subject><subject>Field programmable gate arrays</subject><subject>FPGA</subject><subject>Image analysis</subject><subject>Image processing</subject><subject>Image reconstruction</subject><subject>Information technology</subject><subject>Intelligent robots</subject><subject>Laboratories</subject><subject>Logic programming</subject><subject>reconfigurable computing</subject><subject>Reconfigurable logic</subject><subject>total reconfiguration</subject><isbn>9780769534978</isbn><isbn>076953497X</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjUtLw0AUhQekoNYsXbnJH0i8N_NeluIjUFBqXZeZ6Z000iSSiYv-eyN1dc7Hge8wdo9QIoJ9rOvdqqwATFlpvGKZ1Qa0spKLuS3Y7d9kwUiU1yxL6QsA0CqNUt4wtaVEbgzHfOjz6Uj5lsLQx7b5GZ0_UV53rqH8fRwCpdT2Tf5xThN1d2wR3SlR9p9L9vn8tFu_Fpu3l3q92hRtJXAqVAQEp5w7YIjzozXR6Mpxbj1Ij0IIHkycWVoSlQ0eD8i9DY50IOUtX7KHi7clov332HZuPO-F5lYa4L98t0Xk</recordid><startdate>200812</startdate><enddate>200812</enddate><creator>Chang-le Li</creator><creator>Ji-zhuang Fan</creator><creator>Jie Zhao</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200812</creationdate><title>Research on the Reconfigurable Image Processing System</title><author>Chang-le Li ; Ji-zhuang Fan ; Jie Zhao</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i241t-6f010a6aad1cf67198f872a339b05b14443c8fa3359e429cb1d13b9cae7ce6b93</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Control systems</topic><topic>dynamic reconfiguration</topic><topic>Field programmable gate arrays</topic><topic>FPGA</topic><topic>Image analysis</topic><topic>Image processing</topic><topic>Image reconstruction</topic><topic>Information technology</topic><topic>Intelligent robots</topic><topic>Laboratories</topic><topic>Logic programming</topic><topic>reconfigurable computing</topic><topic>Reconfigurable logic</topic><topic>total reconfiguration</topic><toplevel>online_resources</toplevel><creatorcontrib>Chang-le Li</creatorcontrib><creatorcontrib>Ji-zhuang Fan</creatorcontrib><creatorcontrib>Jie Zhao</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chang-le Li</au><au>Ji-zhuang Fan</au><au>Jie Zhao</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Research on the Reconfigurable Image Processing System</atitle><btitle>2008 Second International Symposium on Intelligent Information Technology Application</btitle><stitle>IITA</stitle><date>2008-12</date><risdate>2008</risdate><volume>1</volume><spage>284</spage><epage>288</epage><pages>284-288</pages><isbn>9780769534978</isbn><isbn>076953497X</isbn><abstract>In view of problems of the processing performance and system flexibility for the current image processing system, propose an image processing system using reconfigurable technology. Studying on the theory of dynamic reconfigurable technology and the feature of reconfigurable system, analyzing the existent problem at present in the image processing system, making the use feature of multi-reconfiguration for FPGA (field programmable gate array), design the reconfigurable image processing system. On the basis of research on the distribute algorithm and the theory of the reconfigurable algorithm, complete the image processing algorithm which can be time-sharing reconfiguration. Implement the LoG (Laplacian of Gaussian) operator and Sobel operator in FPGA, and verify the feasibility and flexibility of system design.</abstract><pub>IEEE</pub><doi>10.1109/IITA.2008.271</doi><tpages>5</tpages></addata></record> |
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| identifier | ISBN: 9780769534978 |
| ispartof | 2008 Second International Symposium on Intelligent Information Technology Application, 2008, Vol.1, p.284-288 |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Control systems dynamic reconfiguration Field programmable gate arrays FPGA Image analysis Image processing Image reconstruction Information technology Intelligent robots Laboratories Logic programming reconfigurable computing Reconfigurable logic total reconfiguration |
| title | Research on the Reconfigurable Image Processing System |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-23T02%3A55%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Research%20on%20the%20Reconfigurable%20Image%20Processing%20System&rft.btitle=2008%20Second%20International%20Symposium%20on%20Intelligent%20Information%20Technology%20Application&rft.au=Chang-le%20Li&rft.date=2008-12&rft.volume=1&rft.spage=284&rft.epage=288&rft.pages=284-288&rft.isbn=9780769534978&rft.isbn_list=076953497X&rft_id=info:doi/10.1109/IITA.2008.271&rft_dat=%3Cieee_6IE%3E4739580%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4739580&rfr_iscdi=true |