A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC

The subthreshold MOS source-coupled logic (STSCL) technique is of great interest for designing ultra low power circuits. In this paper we discuss the design of a pipelined encoder for an 8-bit folding and interpolating (F&I) analog-to-digital (ADC) data converter using this technique. The encode...

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Bibliographische Detailangaben

Hauptverfasser:	Beikahmadi, M., Tajalli, A., Leblebici, Y.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS logic circuits CMOS technology Crosstalk Energy consumption Frequency Logic circuits Logic design MOS devices Switches Voltage
Online-Zugang:	Volltext bestellen
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