Low-power carry look-ahead adder with multi-threshold voltage CMOS technology
Multi-threshold CMOS (MTCMOS) technology provides the transistors that have low-, normal-, and high-threshold voltage. This paper describes a low-power carry look-ahead adder with MTCMOS technology. While the low-threshold voltage transistors are used to reduce the propagation delay time in the crit...
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| creator | Dong Whee Kim Jeong Beom Kim |
| description | Multi-threshold CMOS (MTCMOS) technology provides the transistors that have low-, normal-, and high-threshold voltage. This paper describes a low-power carry look-ahead adder with MTCMOS technology. While the low-threshold voltage transistors are used to reduce the propagation delay time in the critical path, the high-threshold voltage transistors are used to reduce the power consumption in the shortest path. Comparing with the conventional CMOS circuit, the circuit is achieved to reduce the power consumption by 14.71% and the power-delay-product by 16.11%. This circuit is designed with Samsung 0.35 um CMOS process. The validity and effectiveness are verified through the HSPICE simulation. |
| doi_str_mv | 10.1109/ICSICT.2008.4734996 |
| format | Conference Proceeding |
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This paper describes a low-power carry look-ahead adder with MTCMOS technology. While the low-threshold voltage transistors are used to reduce the propagation delay time in the critical path, the high-threshold voltage transistors are used to reduce the power consumption in the shortest path. Comparing with the conventional CMOS circuit, the circuit is achieved to reduce the power consumption by 14.71% and the power-delay-product by 16.11%. This circuit is designed with Samsung 0.35 um CMOS process. The validity and effectiveness are verified through the HSPICE simulation.</description><identifier>ISBN: 9781424421855</identifier><identifier>ISBN: 1424421853</identifier><identifier>EISBN: 9781424421862</identifier><identifier>EISBN: 1424421861</identifier><identifier>DOI: 10.1109/ICSICT.2008.4734996</identifier><identifier>LCCN: 2008901172</identifier><language>eng</language><publisher>IEEE</publisher><subject>Adders ; Circuit simulation ; Circuit synthesis ; CMOS technology ; Energy consumption ; Integrated circuit technology ; MOSFETs ; Propagation delay ; Threshold voltage ; Very large scale integration</subject><ispartof>2008 9th International Conference on Solid-State and Integrated-Circuit Technology, 2008, p.2160-2163</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c140t-4f1ca22a9896340b597b6a54cdaa6c81c32c2d12f2f2669b861ee8d91847c6e93</citedby></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4734996$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4734996$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Dong Whee Kim</creatorcontrib><creatorcontrib>Jeong Beom Kim</creatorcontrib><title>Low-power carry look-ahead adder with multi-threshold voltage CMOS technology</title><title>2008 9th International Conference on Solid-State and Integrated-Circuit Technology</title><addtitle>ICSICT</addtitle><description>Multi-threshold CMOS (MTCMOS) technology provides the transistors that have low-, normal-, and high-threshold voltage. This paper describes a low-power carry look-ahead adder with MTCMOS technology. While the low-threshold voltage transistors are used to reduce the propagation delay time in the critical path, the high-threshold voltage transistors are used to reduce the power consumption in the shortest path. Comparing with the conventional CMOS circuit, the circuit is achieved to reduce the power consumption by 14.71% and the power-delay-product by 16.11%. This circuit is designed with Samsung 0.35 um CMOS process. The validity and effectiveness are verified through the HSPICE simulation.</description><subject>Adders</subject><subject>Circuit simulation</subject><subject>Circuit synthesis</subject><subject>CMOS technology</subject><subject>Energy consumption</subject><subject>Integrated circuit technology</subject><subject>MOSFETs</subject><subject>Propagation delay</subject><subject>Threshold voltage</subject><subject>Very large scale integration</subject><isbn>9781424421855</isbn><isbn>1424421853</isbn><isbn>9781424421862</isbn><isbn>1424421861</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVUM1OwzAYC0KTgNEn2CUvkJIvf02OqOKnUqcdNs5TmqRroSNTW6j29hSxC_bBsmX5YIRWQFMAah6KfFvku5RRqlORcWGMukKJyTQIJgQDrdj1Py_lAt391g0FyNgNSobhnc4Qkistb9G6jBM5xSn02Nm-P-Muxg9im2A9tt7P8dSODT5-dWNLxqYPQxM7j79jN9pDwPl6s8VjcM1n7OLhfI8Wte2GkFx0id6en3b5Kyk3L0X-WBIHgo5E1OAsY9Zoo7iglTRZpawUzlurnAbHmWMeWD1TKVNpBSFob0CLzKlg-BKt_nbbEML-1LdH25_3l0f4Dx8ZUk0</recordid><startdate>200810</startdate><enddate>200810</enddate><creator>Dong Whee Kim</creator><creator>Jeong Beom Kim</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200810</creationdate><title>Low-power carry look-ahead adder with multi-threshold voltage CMOS technology</title><author>Dong Whee Kim ; Jeong Beom Kim</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c140t-4f1ca22a9896340b597b6a54cdaa6c81c32c2d12f2f2669b861ee8d91847c6e93</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Adders</topic><topic>Circuit simulation</topic><topic>Circuit synthesis</topic><topic>CMOS technology</topic><topic>Energy consumption</topic><topic>Integrated circuit technology</topic><topic>MOSFETs</topic><topic>Propagation delay</topic><topic>Threshold voltage</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Dong Whee Kim</creatorcontrib><creatorcontrib>Jeong Beom Kim</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dong Whee Kim</au><au>Jeong Beom Kim</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Low-power carry look-ahead adder with multi-threshold voltage CMOS technology</atitle><btitle>2008 9th International Conference on Solid-State and Integrated-Circuit Technology</btitle><stitle>ICSICT</stitle><date>2008-10</date><risdate>2008</risdate><spage>2160</spage><epage>2163</epage><pages>2160-2163</pages><isbn>9781424421855</isbn><isbn>1424421853</isbn><eisbn>9781424421862</eisbn><eisbn>1424421861</eisbn><abstract>Multi-threshold CMOS (MTCMOS) technology provides the transistors that have low-, normal-, and high-threshold voltage. This paper describes a low-power carry look-ahead adder with MTCMOS technology. While the low-threshold voltage transistors are used to reduce the propagation delay time in the critical path, the high-threshold voltage transistors are used to reduce the power consumption in the shortest path. Comparing with the conventional CMOS circuit, the circuit is achieved to reduce the power consumption by 14.71% and the power-delay-product by 16.11%. This circuit is designed with Samsung 0.35 um CMOS process. The validity and effectiveness are verified through the HSPICE simulation.</abstract><pub>IEEE</pub><doi>10.1109/ICSICT.2008.4734996</doi><tpages>4</tpages></addata></record> |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Adders Circuit simulation Circuit synthesis CMOS technology Energy consumption Integrated circuit technology MOSFETs Propagation delay Threshold voltage Very large scale integration |
| title | Low-power carry look-ahead adder with multi-threshold voltage CMOS technology |
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