PLL settling time: phase vs. frequency

PLL settling time: phase vs. frequency

The tuning speed of frequency synthesizers is usually specified by either phase or frequency settling. The paper shows that in frequency hopping systems phase settling characteristics correspond to system performance better than frequency settling characteristics. Simulation results are compared to...

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1. Verfasser: Phillips, D.E.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analytical models
Band pass filters
Circuit simulation
Delay effects
Frequency shift keying
Frequency synthesizers
Matched filters
Phase locked loops
RLC circuits
System performance
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description The tuning speed of frequency synthesizers is usually specified by either phase or frequency settling. The paper shows that in frequency hopping systems phase settling characteristics correspond to system performance better than frequency settling characteristics. Simulation results are compared to a mathematical analysis, and intuitive explanations are used to clarify this paradoxical relationship. Specific phase settling specifications are discussed.< >
doi_str_mv 10.1109/TCC.1994.472121
format Conference Proceeding
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The paper shows that in frequency hopping systems phase settling characteristics correspond to system performance better than frequency settling characteristics. Simulation results are compared to a mathematical analysis, and intuitive explanations are used to clarify this paradoxical relationship. Specific phase settling specifications are discussed.&lt; &gt;</description><subject>Analytical models</subject><subject>Band pass filters</subject><subject>Circuit simulation</subject><subject>Delay effects</subject><subject>Frequency shift keying</subject><subject>Frequency synthesizers</subject><subject>Matched filters</subject><subject>Phase locked loops</subject><subject>RLC circuits</subject><subject>System performance</subject><isbn>0780320042</isbn><isbn>9780780320048</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1994</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpjYBA3NNAzNDSw1A9xdtYztLQ00TMxNzI0MmRm4DIwtzAwNjIwMDHiYOAtLs4yAAITE1MjCzNOBrUAHx-F4tSSkpzMvHSFkszcVCuFgozE4lSFsmI9hbSi1MLS1LzkSh4G1rTEnOJUXijNzSDl5hri7KGbmZqaGl9QlJmbWFQZD7HRGK8kAMc8LXk</recordid><startdate>1994</startdate><enddate>1994</enddate><creator>Phillips, D.E.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1994</creationdate><title>PLL settling time: phase vs. frequency</title><author>Phillips, D.E.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_4721213</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Analytical models</topic><topic>Band pass filters</topic><topic>Circuit simulation</topic><topic>Delay effects</topic><topic>Frequency shift keying</topic><topic>Frequency synthesizers</topic><topic>Matched filters</topic><topic>Phase locked loops</topic><topic>RLC circuits</topic><topic>System performance</topic><toplevel>online_resources</toplevel><creatorcontrib>Phillips, D.E.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Phillips, D.E.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>PLL settling time: phase vs. frequency</atitle><btitle>Proceedings of TCC'94 - Tactical Communications Conference</btitle><stitle>TCC</stitle><date>1994</date><risdate>1994</risdate><spage>283</spage><epage>288</epage><pages>283-288</pages><isbn>0780320042</isbn><isbn>9780780320048</isbn><abstract>The tuning speed of frequency synthesizers is usually specified by either phase or frequency settling. The paper shows that in frequency hopping systems phase settling characteristics correspond to system performance better than frequency settling characteristics. Simulation results are compared to a mathematical analysis, and intuitive explanations are used to clarify this paradoxical relationship. Specific phase settling specifications are discussed.&lt; &gt;</abstract><pub>IEEE</pub><doi>10.1109/TCC.1994.472121</doi></addata></record>
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ispartof Proceedings of TCC'94 - Tactical Communications Conference, 1994, p.283-288
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Analytical models
Band pass filters
Circuit simulation
Delay effects
Frequency shift keying
Frequency synthesizers
Matched filters
Phase locked loops
RLC circuits
System performance
title PLL settling time: phase vs. frequency
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