Importance sampling Monte Carlo simulations for accurate estimation of SRAM yield
Variability is an important aspect of SRAM cell design. Failure probabilities of P fail les10 -10 have to be estimated through statistical simulations. Accurate statistical techniques such as Importance Sampling Monte Carlo simulations are essential to accurately and efficiently estimate such low fa...
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creator | Doorn, T.S. ter Maten, E.J.W. Croon, J.A. Di Bucchianico, A. Wittich, O. |
description | Variability is an important aspect of SRAM cell design. Failure probabilities of P fail les10 -10 have to be estimated through statistical simulations. Accurate statistical techniques such as Importance Sampling Monte Carlo simulations are essential to accurately and efficiently estimate such low failure probabilities. This paper shows that a simple form of Importance Sampling is sufficient for simulating P fail les10 -10 for the SRAM parameters Static Noise Margin, Write Margin and Read Current. For the SNM, a new simple technique is proposed that allows extrapolating the SNM distribution based on a limited number of trials. For SRAM total leakage currents, it suffices to take the averages into account for designing SRAM cells and modules. A guideline is proposed to ensure bitline leakage currents do not compromise SRAM functionality. |
doi_str_mv | 10.1109/ESSCIRC.2008.4681834 |
format | Conference Proceeding |
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Failure probabilities of P fail les10 -10 have to be estimated through statistical simulations. Accurate statistical techniques such as Importance Sampling Monte Carlo simulations are essential to accurately and efficiently estimate such low failure probabilities. This paper shows that a simple form of Importance Sampling is sufficient for simulating P fail les10 -10 for the SRAM parameters Static Noise Margin, Write Margin and Read Current. For the SNM, a new simple technique is proposed that allows extrapolating the SNM distribution based on a limited number of trials. For SRAM total leakage currents, it suffices to take the averages into account for designing SRAM cells and modules. A guideline is proposed to ensure bitline leakage currents do not compromise SRAM functionality.</abstract><pub>IEEE</pub><doi>10.1109/ESSCIRC.2008.4681834</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record> |
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issn | 1930-8833 2643-1319 |
language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Extrapolation Guidelines Leakage current Monte Carlo methods Probability density function Probability distribution Random access memory Temperature Voltage Yield estimation |
title | Importance sampling Monte Carlo simulations for accurate estimation of SRAM yield |
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