A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13μm CMOS
This paper presents a 12.5-Gbps transmitter that uses a lookup table (LUT)-based equalizer to compensate for within-die imperfections. An equalization technique with 2x sampling is proposed to accommodate timing offsets in the multiphase clocks used for 8:1 serialization. LUT code remapping is also...
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| creator | Hayun Chung Liu, A. Gu-Yeon Wei |
| description | This paper presents a 12.5-Gbps transmitter that uses a lookup table (LUT)-based equalizer to compensate for within-die imperfections. An equalization technique with 2x sampling is proposed to accommodate timing offsets in the multiphase clocks used for 8:1 serialization. LUT code remapping is also demonstrated to compensate for mismatch effects that introduce nonlinearity in the transmit DAC. Experimental results of a 7-bit resolution transmitter with 4-tap equalization, implemented in 0.13 mum CMOS, show the LUT-based equalizer can significantly improve the signal integrity of an otherwise closed eye for data transmitted at 12.5-Gbps. |
| doi_str_mv | 10.1109/CICC.2008.4672147 |
| format | Conference Proceeding |
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An equalization technique with 2x sampling is proposed to accommodate timing offsets in the multiphase clocks used for 8:1 serialization. LUT code remapping is also demonstrated to compensate for mismatch effects that introduce nonlinearity in the transmit DAC. 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An equalization technique with 2x sampling is proposed to accommodate timing offsets in the multiphase clocks used for 8:1 serialization. LUT code remapping is also demonstrated to compensate for mismatch effects that introduce nonlinearity in the transmit DAC. Experimental results of a 7-bit resolution transmitter with 4-tap equalization, implemented in 0.13 mum CMOS, show the LUT-based equalizer can significantly improve the signal integrity of an otherwise closed eye for data transmitted at 12.5-Gbps.</description><subject>Circuits</subject><subject>Clocks</subject><subject>Degradation</subject><subject>Equalizers</subject><subject>Fluctuations</subject><subject>Sampling methods</subject><subject>Signal resolution</subject><subject>Table lookup</subject><subject>Timing</subject><subject>Transmitters</subject><issn>0886-5930</issn><issn>2152-3630</issn><isbn>9781424420186</isbn><isbn>1424420180</isbn><isbn>9781424420193</isbn><isbn>1424420199</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVkFtKQzEYhOOl4LF2AeJLFmCOf-7JY4laC5Ui1ueS0_zBSFtrzxHRtbkG12TBvvg0A8M3DEPIOYeac_BXYRxCLQBcrYwVXNkDMvDWcSWUEsC9PCSV4FowaSQc_cucOSYVOGeY9hJ6pHKaGS2tdCfktG1fYId7JyryMKRc1JqNmk17SS1rSke7bVy3q525Hgb6UbpnqlgXN3TyNGNNbDFRfHuPy_IVu_K6pmVNd4Plz_eKhvvp4xnp5bhscbDXPpnd3szCHZtMR-MwnLDioWMpIV8AJozOoOEIOTqtUWcVldXJZ52Ty1I20epFA5nnqHNEdKgF9zbJPrn4qy2ION9syypuP-f7o-QvBjlT9A</recordid><startdate>200809</startdate><enddate>200809</enddate><creator>Hayun Chung</creator><creator>Liu, A.</creator><creator>Gu-Yeon Wei</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200809</creationdate><title>A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13μm CMOS</title><author>Hayun Chung ; Liu, A. ; Gu-Yeon Wei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-dde1c0edea86e61e0fa855e5f4a475d9f5fd8f33ba75cb0f1fa5faee8e52197d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Circuits</topic><topic>Clocks</topic><topic>Degradation</topic><topic>Equalizers</topic><topic>Fluctuations</topic><topic>Sampling methods</topic><topic>Signal resolution</topic><topic>Table lookup</topic><topic>Timing</topic><topic>Transmitters</topic><toplevel>online_resources</toplevel><creatorcontrib>Hayun Chung</creatorcontrib><creatorcontrib>Liu, A.</creatorcontrib><creatorcontrib>Gu-Yeon Wei</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hayun Chung</au><au>Liu, A.</au><au>Gu-Yeon Wei</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13μm CMOS</atitle><btitle>2008 IEEE Custom Integrated Circuits Conference</btitle><stitle>CICC</stitle><date>2008-09</date><risdate>2008</risdate><spage>563</spage><epage>566</epage><pages>563-566</pages><issn>0886-5930</issn><eissn>2152-3630</eissn><isbn>9781424420186</isbn><isbn>1424420180</isbn><eisbn>9781424420193</eisbn><eisbn>1424420199</eisbn><abstract>This paper presents a 12.5-Gbps transmitter that uses a lookup table (LUT)-based equalizer to compensate for within-die imperfections. An equalization technique with 2x sampling is proposed to accommodate timing offsets in the multiphase clocks used for 8:1 serialization. LUT code remapping is also demonstrated to compensate for mismatch effects that introduce nonlinearity in the transmit DAC. Experimental results of a 7-bit resolution transmitter with 4-tap equalization, implemented in 0.13 mum CMOS, show the LUT-based equalizer can significantly improve the signal integrity of an otherwise closed eye for data transmitted at 12.5-Gbps.</abstract><pub>IEEE</pub><doi>10.1109/CICC.2008.4672147</doi><tpages>4</tpages></addata></record> |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuits Clocks Degradation Equalizers Fluctuations Sampling methods Signal resolution Table lookup Timing Transmitters |
| title | A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13μm CMOS |
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