Systematic validation of pipeline interlock for superscalar microarchitectures

The paper presents a new approach to microarchitecture validation that adopts a paradigm analogous to that of automatic test pattern generation (ATPG) for digital logic testing. In this approach, the microarchitecture is rigorously specified in a set of machine description files. Based on these file...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Diep, T.A., Shen, J.P.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Automatic test pattern generation Automatic testing Fault diagnosis Hazards Logic testing Microarchitecture Microprocessors Pipelines System testing Test pattern generators
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