An Efficient Hardware Simulator for the Design of a WCDMA Interference Cancellation Repeater

An efficient hardware simulator for the design of a WCDMA interference cancellation repeater (ICR) is presented. The ICR, which is composed of a digital interference canceller and analog parts, is a time-varying system that reacts to a time varying input signal. The design of the digital interferenc...

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Bibliographische Detailangaben

Hauptverfasser:	Moohong Lee, Byungjik Keum, Yunmok Son, Hwang Soo Lee, Ju Tae Song, Joo-Wan Kim
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Delay Hardware Interference cancellation Multiaccess communication Radio frequency Repeaters Spread spectrum communication
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